[][src]Module stm32ral::stm32h7::stm32h7x3::dma2d::DMA2D_ISR

DMA2D Interrupt Status Register

Modules

CAEIF

CLUT access error interrupt flag This bit is set when the CPU accesses the CLUT while the CLUT is being automatically copied from a system memory to the internal DMA2D.

CEIF

Configuration error interrupt flag This bit is set when the START bit of DMA2D_CR, DMA2DFGPFCCR or DMA2D_BGPFCCR is set and a wrong configuration has been programmed.

CTCIF

CLUT transfer complete interrupt flag This bit is set when the CLUT copy from a system memory area to the internal DMA2D memory is complete.

TCIF

Transfer complete interrupt flag This bit is set when a DMA2D transfer operation is complete (data transfer only).

TEIF

Transfer error interrupt flag This bit is set when an error occurs during a DMA transfer (data transfer or automatic CLUT loading).

TWIF

Transfer watermark interrupt flag This bit is set when the last pixel of the watermarked line has been transferred.