Module stm32mp1::stm32mp157::rtc
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RTC
Modules
This register can be written only when ALRAWF is set to 1 in RTC_ICSR, or in initialization mode. This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
This register can be written only when ALRAWF is set to 1 in RTC_ICSR, or in initialization mode. This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be write-protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
RTC configuration register
This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be globally protected, or each bit of this register can be individually protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
The RTC_DR is the calendar date shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page1830 and Reading the calendar on page1831. This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be write-protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
RTC hardware configuration register
This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be globally protected, or each bit of this register can be individually protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
RTC identification register
RTC non-secure masked interrupt status register
This register must be written in initialization mode only. The initialization must be performed in two separate write accesses. Refer to Calendar initialization and configuration on page1830. This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be write-protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
RTC size identification register
This register can be written only when the APB access is secure.
This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
RTC sub second register
The RTC_TR is the calendar time shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page1830 and Reading the calendar on page1831. This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be write-protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
The content of this register is valid only when TSF is set to 1 in RTC_SR. It is cleared when TSF bit is reset. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
The content of this register is valid only when TSF is set to 1 in RTC_SR. It is cleared when the TSF bit is reset. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
The content of this register is valid only when TSF is set to 1 in RTC_SR. It is cleared when TSF bit is reset. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
RTC version register
RTC write protection register
This register can be written only when WUTWF is set to 1 in RTC_ICSR. This register is write protected. The write access procedure is described in RTC register write protection on page1830. This register can be protected against non-secure access. Refer to Section50.3.4: RTC secure protection modes.
Structs
Register block
Type Definitions
ALRMR register accessor: an alias for Reg<ALRMR_SPEC>
ALRMSSR register accessor: an alias for Reg<ALRMSSR_SPEC>
CALR register accessor: an alias for Reg<CALR_SPEC>
CFGR register accessor: an alias for Reg<CFGR_SPEC>
CR register accessor: an alias for Reg<CR_SPEC>
DR register accessor: an alias for Reg<DR_SPEC>
HWCFGR register accessor: an alias for Reg<HWCFGR_SPEC>
ICSR register accessor: an alias for Reg<ICSR_SPEC>
IPIDR register accessor: an alias for Reg<IPIDR_SPEC>
MISR register accessor: an alias for Reg<MISR_SPEC>
PRER register accessor: an alias for Reg<PRER_SPEC>
SCR register accessor: an alias for Reg<SCR_SPEC>
SHIFTR register accessor: an alias for Reg<SHIFTR_SPEC>
SIDR register accessor: an alias for Reg<SIDR_SPEC>
SMCR register accessor: an alias for Reg<SMCR_SPEC>
SMISR register accessor: an alias for Reg<SMISR_SPEC>
SR register accessor: an alias for Reg<SR_SPEC>
SSR register accessor: an alias for Reg<SSR_SPEC>
TR register accessor: an alias for Reg<TR_SPEC>
TSDR register accessor: an alias for Reg<TSDR_SPEC>
TSSSR register accessor: an alias for Reg<TSSSR_SPEC>
TSTR register accessor: an alias for Reg<TSTR_SPEC>
VERR register accessor: an alias for Reg<VERR_SPEC>
WPR register accessor: an alias for Reg<WPR_SPEC>
WUTR register accessor: an alias for Reg<WUTR_SPEC>