Module stm32mp1::stm32mp157::eth_mtl
source · [−]Expand description
ETH_MTL
Modules
The software driver (application) reads this register during interrupt service routine or polling to determine the interrupt status of MTL queues and the MAC.
The Operating Mode register establishes the Transmit and Receive operating modes and commands.
Queue 0 interrupt control status Register
Queue 1 interrupt control status Register
Rx queue 0 control register
Rx queue i debug register
Rx queue 0 missed packet and overflow counter register
Rx queue 0 operating mode register
Rx queue 1 control register
Rx queue i debug register
Rx queue 1 missed packet and overflow counter register
Rx queue 1 operating mode register
Tx queue 0 underflow register
Tx queue x ETS status Register
Tx queue 0 operating mode Register
Tx queue 0 underflow register
Tx queue 1 underflow register
The Queue ETS Control register controls the enhanced transmission selection operation.
Tx queue x ETS status Register
The hiCredit register contains the hiCredit value required for the credit-based shaper algorithm for the Queue.
The loCredit register contains the loCredit value required for the credit-based shaper algorithm for the Queue.
Tx queue 1 operating mode Register
This register provides the average traffic transmitted on queue 1.
The sendSlopeCredit register contains the sendSlope credit value required for the credit-based shaper algorithm for the Queue.
Tx queue 1 underflow register
Structs
Register block
Type Definitions
ETH_MTLISR register accessor: an alias for Reg<ETH_MTLISR_SPEC>
ETH_MTLOMR register accessor: an alias for Reg<ETH_MTLOMR_SPEC>
ETH_MTLQ0ICSR register accessor: an alias for Reg<ETH_MTLQ0ICSR_SPEC>
ETH_MTLQ1ICSR register accessor: an alias for Reg<ETH_MTLQ1ICSR_SPEC>
ETH_MTLRxQ0CR register accessor: an alias for Reg<ETH_MTLRXQ0CR_SPEC>
ETH_MTLRxQ0DR register accessor: an alias for Reg<ETH_MTLRXQ0DR_SPEC>
ETH_MTLRxQ0MPOCR register accessor: an alias for Reg<ETH_MTLRXQ0MPOCR_SPEC>
ETH_MTLRxQ0OMR register accessor: an alias for Reg<ETH_MTLRXQ0OMR_SPEC>
ETH_MTLRxQ1CR register accessor: an alias for Reg<ETH_MTLRXQ1CR_SPEC>
ETH_MTLRxQ1DR register accessor: an alias for Reg<ETH_MTLRXQ1DR_SPEC>
ETH_MTLRxQ1MPOCR register accessor: an alias for Reg<ETH_MTLRXQ1MPOCR_SPEC>
ETH_MTLRxQ1OMR register accessor: an alias for Reg<ETH_MTLRXQ1OMR_SPEC>
ETH_MTLTxQ0DR register accessor: an alias for Reg<ETH_MTLTXQ0DR_SPEC>
ETH_MTLTxQ0ESR register accessor: an alias for Reg<ETH_MTLTXQ0ESR_SPEC>
ETH_MTLTxQ0OMR register accessor: an alias for Reg<ETH_MTLTXQ0OMR_SPEC>
ETH_MTLTxQ0UR register accessor: an alias for Reg<ETH_MTLTXQ0UR_SPEC>
ETH_MTLTxQ1DR register accessor: an alias for Reg<ETH_MTLTXQ1DR_SPEC>
ETH_MTLTxQ1ECR register accessor: an alias for Reg<ETH_MTLTXQ1ECR_SPEC>
ETH_MTLTxQ1ESR register accessor: an alias for Reg<ETH_MTLTXQ1ESR_SPEC>
ETH_MTLTxQ1HCR register accessor: an alias for Reg<ETH_MTLTXQ1HCR_SPEC>
ETH_MTLTxQ1LCR register accessor: an alias for Reg<ETH_MTLTXQ1LCR_SPEC>
ETH_MTLTxQ1OMR register accessor: an alias for Reg<ETH_MTLTXQ1OMR_SPEC>
ETH_MTLTxQ1QWR register accessor: an alias for Reg<ETH_MTLTXQ1QWR_SPEC>
ETH_MTLTxQ1SSCR register accessor: an alias for Reg<ETH_MTLTXQ1SSCR_SPEC>
ETH_MTLTxQ1UR register accessor: an alias for Reg<ETH_MTLTXQ1UR_SPEC>