stm32l4x2_pac/rcc/
apb1enr2.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::APB1ENR2 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct LPTIM2ENR {
47 bits: bool,
48}
49impl LPTIM2ENR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct SWPMI1ENR {
68 bits: bool,
69}
70impl SWPMI1ENR {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bit(&self) -> bool {
74 self.bits
75 }
76 #[doc = r" Returns `true` if the bit is clear (0)"]
77 #[inline]
78 pub fn bit_is_clear(&self) -> bool {
79 !self.bit()
80 }
81 #[doc = r" Returns `true` if the bit is set (1)"]
82 #[inline]
83 pub fn bit_is_set(&self) -> bool {
84 self.bit()
85 }
86}
87#[doc = r" Value of the field"]
88pub struct LPUART1ENR {
89 bits: bool,
90}
91impl LPUART1ENR {
92 #[doc = r" Value of the field as raw bits"]
93 #[inline]
94 pub fn bit(&self) -> bool {
95 self.bits
96 }
97 #[doc = r" Returns `true` if the bit is clear (0)"]
98 #[inline]
99 pub fn bit_is_clear(&self) -> bool {
100 !self.bit()
101 }
102 #[doc = r" Returns `true` if the bit is set (1)"]
103 #[inline]
104 pub fn bit_is_set(&self) -> bool {
105 self.bit()
106 }
107}
108#[doc = r" Value of the field"]
109pub struct DFSDMENR {
110 bits: bool,
111}
112impl DFSDMENR {
113 #[doc = r" Value of the field as raw bits"]
114 #[inline]
115 pub fn bit(&self) -> bool {
116 self.bits
117 }
118 #[doc = r" Returns `true` if the bit is clear (0)"]
119 #[inline]
120 pub fn bit_is_clear(&self) -> bool {
121 !self.bit()
122 }
123 #[doc = r" Returns `true` if the bit is set (1)"]
124 #[inline]
125 pub fn bit_is_set(&self) -> bool {
126 self.bit()
127 }
128}
129#[doc = r" Value of the field"]
130pub struct I2C4ENR {
131 bits: bool,
132}
133impl I2C4ENR {
134 #[doc = r" Value of the field as raw bits"]
135 #[inline]
136 pub fn bit(&self) -> bool {
137 self.bits
138 }
139 #[doc = r" Returns `true` if the bit is clear (0)"]
140 #[inline]
141 pub fn bit_is_clear(&self) -> bool {
142 !self.bit()
143 }
144 #[doc = r" Returns `true` if the bit is set (1)"]
145 #[inline]
146 pub fn bit_is_set(&self) -> bool {
147 self.bit()
148 }
149}
150#[doc = r" Proxy"]
151pub struct _LPTIM2ENW<'a> {
152 w: &'a mut W,
153}
154impl<'a> _LPTIM2ENW<'a> {
155 #[doc = r" Sets the field bit"]
156 pub fn set_bit(self) -> &'a mut W {
157 self.bit(true)
158 }
159 #[doc = r" Clears the field bit"]
160 pub fn clear_bit(self) -> &'a mut W {
161 self.bit(false)
162 }
163 #[doc = r" Writes raw bits to the field"]
164 #[inline]
165 pub fn bit(self, value: bool) -> &'a mut W {
166 const MASK: bool = true;
167 const OFFSET: u8 = 5;
168 self.w.bits &= !((MASK as u32) << OFFSET);
169 self.w.bits |= ((value & MASK) as u32) << OFFSET;
170 self.w
171 }
172}
173#[doc = r" Proxy"]
174pub struct _SWPMI1ENW<'a> {
175 w: &'a mut W,
176}
177impl<'a> _SWPMI1ENW<'a> {
178 #[doc = r" Sets the field bit"]
179 pub fn set_bit(self) -> &'a mut W {
180 self.bit(true)
181 }
182 #[doc = r" Clears the field bit"]
183 pub fn clear_bit(self) -> &'a mut W {
184 self.bit(false)
185 }
186 #[doc = r" Writes raw bits to the field"]
187 #[inline]
188 pub fn bit(self, value: bool) -> &'a mut W {
189 const MASK: bool = true;
190 const OFFSET: u8 = 2;
191 self.w.bits &= !((MASK as u32) << OFFSET);
192 self.w.bits |= ((value & MASK) as u32) << OFFSET;
193 self.w
194 }
195}
196#[doc = r" Proxy"]
197pub struct _LPUART1ENW<'a> {
198 w: &'a mut W,
199}
200impl<'a> _LPUART1ENW<'a> {
201 #[doc = r" Sets the field bit"]
202 pub fn set_bit(self) -> &'a mut W {
203 self.bit(true)
204 }
205 #[doc = r" Clears the field bit"]
206 pub fn clear_bit(self) -> &'a mut W {
207 self.bit(false)
208 }
209 #[doc = r" Writes raw bits to the field"]
210 #[inline]
211 pub fn bit(self, value: bool) -> &'a mut W {
212 const MASK: bool = true;
213 const OFFSET: u8 = 0;
214 self.w.bits &= !((MASK as u32) << OFFSET);
215 self.w.bits |= ((value & MASK) as u32) << OFFSET;
216 self.w
217 }
218}
219#[doc = r" Proxy"]
220pub struct _DFSDMENW<'a> {
221 w: &'a mut W,
222}
223impl<'a> _DFSDMENW<'a> {
224 #[doc = r" Sets the field bit"]
225 pub fn set_bit(self) -> &'a mut W {
226 self.bit(true)
227 }
228 #[doc = r" Clears the field bit"]
229 pub fn clear_bit(self) -> &'a mut W {
230 self.bit(false)
231 }
232 #[doc = r" Writes raw bits to the field"]
233 #[inline]
234 pub fn bit(self, value: bool) -> &'a mut W {
235 const MASK: bool = true;
236 const OFFSET: u8 = 24;
237 self.w.bits &= !((MASK as u32) << OFFSET);
238 self.w.bits |= ((value & MASK) as u32) << OFFSET;
239 self.w
240 }
241}
242#[doc = r" Proxy"]
243pub struct _I2C4ENW<'a> {
244 w: &'a mut W,
245}
246impl<'a> _I2C4ENW<'a> {
247 #[doc = r" Sets the field bit"]
248 pub fn set_bit(self) -> &'a mut W {
249 self.bit(true)
250 }
251 #[doc = r" Clears the field bit"]
252 pub fn clear_bit(self) -> &'a mut W {
253 self.bit(false)
254 }
255 #[doc = r" Writes raw bits to the field"]
256 #[inline]
257 pub fn bit(self, value: bool) -> &'a mut W {
258 const MASK: bool = true;
259 const OFFSET: u8 = 1;
260 self.w.bits &= !((MASK as u32) << OFFSET);
261 self.w.bits |= ((value & MASK) as u32) << OFFSET;
262 self.w
263 }
264}
265impl R {
266 #[doc = r" Value of the register as raw bits"]
267 #[inline]
268 pub fn bits(&self) -> u32 {
269 self.bits
270 }
271 #[doc = "Bit 5 - LPTIM2EN"]
272 #[inline]
273 pub fn lptim2en(&self) -> LPTIM2ENR {
274 let bits = {
275 const MASK: bool = true;
276 const OFFSET: u8 = 5;
277 ((self.bits >> OFFSET) & MASK as u32) != 0
278 };
279 LPTIM2ENR { bits }
280 }
281 #[doc = "Bit 2 - Single wire protocol clock enable"]
282 #[inline]
283 pub fn swpmi1en(&self) -> SWPMI1ENR {
284 let bits = {
285 const MASK: bool = true;
286 const OFFSET: u8 = 2;
287 ((self.bits >> OFFSET) & MASK as u32) != 0
288 };
289 SWPMI1ENR { bits }
290 }
291 #[doc = "Bit 0 - Low power UART 1 clock enable"]
292 #[inline]
293 pub fn lpuart1en(&self) -> LPUART1ENR {
294 let bits = {
295 const MASK: bool = true;
296 const OFFSET: u8 = 0;
297 ((self.bits >> OFFSET) & MASK as u32) != 0
298 };
299 LPUART1ENR { bits }
300 }
301 #[doc = "Bit 24 - DFSDMEN enable"]
302 #[inline]
303 pub fn dfsdmen(&self) -> DFSDMENR {
304 let bits = {
305 const MASK: bool = true;
306 const OFFSET: u8 = 24;
307 ((self.bits >> OFFSET) & MASK as u32) != 0
308 };
309 DFSDMENR { bits }
310 }
311 #[doc = "Bit 1 - I2C4 clock enable"]
312 #[inline]
313 pub fn i2c4en(&self) -> I2C4ENR {
314 let bits = {
315 const MASK: bool = true;
316 const OFFSET: u8 = 1;
317 ((self.bits >> OFFSET) & MASK as u32) != 0
318 };
319 I2C4ENR { bits }
320 }
321}
322impl W {
323 #[doc = r" Reset value of the register"]
324 #[inline]
325 pub fn reset_value() -> W {
326 W { bits: 0 }
327 }
328 #[doc = r" Writes raw bits to the register"]
329 #[inline]
330 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
331 self.bits = bits;
332 self
333 }
334 #[doc = "Bit 5 - LPTIM2EN"]
335 #[inline]
336 pub fn lptim2en(&mut self) -> _LPTIM2ENW {
337 _LPTIM2ENW { w: self }
338 }
339 #[doc = "Bit 2 - Single wire protocol clock enable"]
340 #[inline]
341 pub fn swpmi1en(&mut self) -> _SWPMI1ENW {
342 _SWPMI1ENW { w: self }
343 }
344 #[doc = "Bit 0 - Low power UART 1 clock enable"]
345 #[inline]
346 pub fn lpuart1en(&mut self) -> _LPUART1ENW {
347 _LPUART1ENW { w: self }
348 }
349 #[doc = "Bit 24 - DFSDMEN enable"]
350 #[inline]
351 pub fn dfsdmen(&mut self) -> _DFSDMENW {
352 _DFSDMENW { w: self }
353 }
354 #[doc = "Bit 1 - I2C4 clock enable"]
355 #[inline]
356 pub fn i2c4en(&mut self) -> _I2C4ENW {
357 _I2C4ENW { w: self }
358 }
359}