Module stm32l4::stm32l4x5::lpuart1::cr2

Control register 2

Structs

CR2_SPEC

Control register 2

R

Register CR2 reader

W

Register CR2 writer

Enums

ADDM7_A

7-bit Address Detection/4-bit Address Detection

CLKEN_A

Clock enable

DATAINV_A

Binary data inversion

MSBFIRST_A

Most significant bit first

RXINV_A

RX pin active level inversion

STOP_A

STOP bits

SWAP_A

Swap TX/RX pins

TXINV_A

TX pin active level inversion

Type Definitions

ADDM7_R

Field ADDM7 reader - 7-bit Address Detection/4-bit Address Detection

ADDM7_W

Field ADDM7 writer - 7-bit Address Detection/4-bit Address Detection

ADD_R

Field ADD reader - Address of the USART node

ADD_W

Field ADD writer - Address of the USART node

CLKEN_R

Field CLKEN reader - Clock enable

CLKEN_W

Field CLKEN writer - Clock enable

DATAINV_R

Field DATAINV reader - Binary data inversion

DATAINV_W

Field DATAINV writer - Binary data inversion

MSBFIRST_R

Field MSBFIRST reader - Most significant bit first

MSBFIRST_W

Field MSBFIRST writer - Most significant bit first

RXINV_R

Field RXINV reader - RX pin active level inversion

RXINV_W

Field RXINV writer - RX pin active level inversion

STOP_R

Field STOP reader - STOP bits

STOP_W

Field STOP writer - STOP bits

SWAP_R

Field SWAP reader - Swap TX/RX pins

SWAP_W

Field SWAP writer - Swap TX/RX pins

TXINV_R

Field TXINV reader - TX pin active level inversion

TXINV_W

Field TXINV writer - TX pin active level inversion