1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209

#[doc = "Register `IDR` reader"]
pub struct R(crate::R<IDR_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<IDR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<IDR_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<IDR_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID15_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID14_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID13_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID12_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID11_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID10_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID9_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID8_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID7_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID6_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID5_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID4_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID3_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID2_A;
#[doc = "Port input data bit (y = 0..15)"]
pub use ID0_A as ID1_A;
#[doc = "Field `ID15` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID15_R;
#[doc = "Field `ID14` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID14_R;
#[doc = "Field `ID13` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID13_R;
#[doc = "Field `ID12` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID12_R;
#[doc = "Field `ID11` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID11_R;
#[doc = "Field `ID10` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID10_R;
#[doc = "Field `ID9` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID9_R;
#[doc = "Field `ID8` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID8_R;
#[doc = "Field `ID7` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID7_R;
#[doc = "Field `ID6` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID6_R;
#[doc = "Field `ID5` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID5_R;
#[doc = "Field `ID4` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID4_R;
#[doc = "Field `ID3` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID3_R;
#[doc = "Field `ID2` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID2_R;
#[doc = "Field `ID1` reader - Port input data bit (y = 0..15)"]
pub use ID0_R as ID1_R;
#[doc = "Port input data bit (y = 0..15)\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ID0_A {
    #[doc = "0: Input is logic low"]
    Low = 0,
    #[doc = "1: Input is logic high"]
    High = 1,
}
impl From<ID0_A> for bool {
    #[inline(always)]
    fn from(variant: ID0_A) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `ID0` reader - Port input data bit (y = 0..15)"]
pub type ID0_R = crate::BitReader<ID0_A>;
impl ID0_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> ID0_A {
        match self.bits {
            false => ID0_A::Low,
            true => ID0_A::High,
        }
    }
    #[doc = "Checks if the value of the field is `Low`"]
    #[inline(always)]
    pub fn is_low(&self) -> bool {
        *self == ID0_A::Low
    }
    #[doc = "Checks if the value of the field is `High`"]
    #[inline(always)]
    pub fn is_high(&self) -> bool {
        *self == ID0_A::High
    }
}
impl R {
    #[doc = "Bit 15 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id15(&self) -> ID15_R {
        ID15_R::new(((self.bits >> 15) & 1) != 0)
    }
    #[doc = "Bit 14 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id14(&self) -> ID14_R {
        ID14_R::new(((self.bits >> 14) & 1) != 0)
    }
    #[doc = "Bit 13 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id13(&self) -> ID13_R {
        ID13_R::new(((self.bits >> 13) & 1) != 0)
    }
    #[doc = "Bit 12 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id12(&self) -> ID12_R {
        ID12_R::new(((self.bits >> 12) & 1) != 0)
    }
    #[doc = "Bit 11 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id11(&self) -> ID11_R {
        ID11_R::new(((self.bits >> 11) & 1) != 0)
    }
    #[doc = "Bit 10 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id10(&self) -> ID10_R {
        ID10_R::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 9 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id9(&self) -> ID9_R {
        ID9_R::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 8 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id8(&self) -> ID8_R {
        ID8_R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 7 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id7(&self) -> ID7_R {
        ID7_R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 6 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id6(&self) -> ID6_R {
        ID6_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 5 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id5(&self) -> ID5_R {
        ID5_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 4 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id4(&self) -> ID4_R {
        ID4_R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 3 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id3(&self) -> ID3_R {
        ID3_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 2 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id2(&self) -> ID2_R {
        ID2_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 1 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id1(&self) -> ID1_R {
        ID1_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 0 - Port input data bit (y = 0..15)"]
    #[inline(always)]
    pub fn id0(&self) -> ID0_R {
        ID0_R::new((self.bits & 1) != 0)
    }
}
#[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](index.html) module"]
pub struct IDR_SPEC;
impl crate::RegisterSpec for IDR_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [idr::R](R) reader structure"]
impl crate::Readable for IDR_SPEC {
    type Reader = R;
}
#[doc = "`reset()` method sets IDR to value 0"]
impl crate::Resettable for IDR_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}