Module stm32h7xx_hal::stm32::sdmmc1::fifor [−][src]
The receive and transmit FIFOs can be only read or written as word (32-bit) wide registers. The FIFOs contain 16 entries on sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.When accessing SDMMC_FIFOR with half word or byte access an AHB bus fault is generated.
Structs
| FIFODATA_W | Write proxy for field |
Type Definitions
| FIFODATA_R | Reader of field |
| R | Reader of register FIFOR |
| W | Writer for register FIFOR |