Module stm32h7xx_hal::stm32::rcc::c1_apb4lpenr[−][src]

RCC APB4 Sleep Clock Register

Structs

COMP12LPEN_W	Write proxy for field `COMP12LPEN`
I2C4LPEN_W	Write proxy for field `I2C4LPEN`
LPTIM2LPEN_W	Write proxy for field `LPTIM2LPEN`
LPTIM3LPEN_W	Write proxy for field `LPTIM3LPEN`
LPTIM4LPEN_W	Write proxy for field `LPTIM4LPEN`
LPTIM5LPEN_W	Write proxy for field `LPTIM5LPEN`
LPUART1LPEN_W	Write proxy for field `LPUART1LPEN`
RTCAPBLPEN_W	Write proxy for field `RTCAPBLPEN`
SAI4LPEN_W	Write proxy for field `SAI4LPEN`
SPI6LPEN_W	Write proxy for field `SPI6LPEN`
SYSCFGLPEN_W	Write proxy for field `SYSCFGLPEN`
VREFLPEN_W	Write proxy for field `VREFLPEN`

SYSCFG peripheral clock enable during CSleep mode

COMP12LPEN_A	COMP1/2 peripheral clock enable during CSleep mode
COMP12LPEN_R	Reader of field `COMP12LPEN`
I2C4LPEN_A	I2C4 Peripheral Clocks Enable During CSleep Mode
I2C4LPEN_R	Reader of field `I2C4LPEN`
LPTIM2LPEN_A	LPTIM2 Peripheral Clocks Enable During CSleep Mode
LPTIM2LPEN_R	Reader of field `LPTIM2LPEN`
LPTIM3LPEN_A	LPTIM3 Peripheral Clocks Enable During CSleep Mode
LPTIM3LPEN_R	Reader of field `LPTIM3LPEN`
LPTIM4LPEN_A	LPTIM4 Peripheral Clocks Enable During CSleep Mode
LPTIM4LPEN_R	Reader of field `LPTIM4LPEN`
LPTIM5LPEN_A	LPTIM5 Peripheral Clocks Enable During CSleep Mode
LPTIM5LPEN_R	Reader of field `LPTIM5LPEN`
LPUART1LPEN_A	LPUART1 Peripheral Clocks Enable During CSleep Mode
LPUART1LPEN_R	Reader of field `LPUART1LPEN`
R	Reader of register C1_APB4LPENR
RTCAPBLPEN_A	RTC APB Clock Enable During CSleep Mode
RTCAPBLPEN_R	Reader of field `RTCAPBLPEN`
SAI4LPEN_A	SAI4 Peripheral Clocks Enable During CSleep Mode
SAI4LPEN_R	Reader of field `SAI4LPEN`
SPI6LPEN_A	SPI6 Peripheral Clocks Enable During CSleep Mode
SPI6LPEN_R	Reader of field `SPI6LPEN`
SYSCFGLPEN_R	Reader of field `SYSCFGLPEN`
VREFLPEN_A	VREF peripheral clock enable during CSleep mode
VREFLPEN_R	Reader of field `VREFLPEN`
W	Writer for register C1_APB4LPENR