Enum stm32h7xx_hal::stm32::iwdg::pr::PR_A

#[repr(u8)]pub enum PR_A {
    DIVIDEBY4,
    DIVIDEBY8,
    DIVIDEBY16,
    DIVIDEBY32,
    DIVIDEBY64,
    DIVIDEBY128,
    DIVIDEBY256,
    DIVIDEBY256BIS,
}

Prescaler divider These bits are write access protected see Section23.3.6: Register access protection. They are written by software to select the prescaler divider feeding the counter clock. PVU bit of IWDG_SR must be reset in order to be able to change the prescaler divider. Note: Reading this register returns the prescaler value from the VDD voltage domain. This value may not be up to date/valid if a write operation to this register is ongoing. For this reason the value read from this register is valid only when the PVU bit in the IWDG_SR register is reset.

Value on reset: 0

Variants

DIVIDEBY4

0: Divider /4

DIVIDEBY8

1: Divider /8

DIVIDEBY16

2: Divider /16

DIVIDEBY32

3: Divider /32

DIVIDEBY64

4: Divider /64

DIVIDEBY128

5: Divider /128

DIVIDEBY256

6: Divider /256

DIVIDEBY256BIS

7: Divider /256

Trait Implementations

impl Clone for PR_A

pub fn clone(&self) -> PR_A

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for PR_A

impl Debug for PR_A

pub fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq<PR_A> for PR_A

pub fn eq(&self, other: &PR_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use]pub fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for PR_A