Module stm32h7xx_hal::stm32::i2c1::icr [−][src]
Access: No wait states
Structs
| ADDRCF_W | Write proxy for field |
| ALERTCF_W | Write proxy for field |
| ARLOCF_W | Write proxy for field |
| BERRCF_W | Write proxy for field |
| NACKCF_W | Write proxy for field |
| OVRCF_W | Write proxy for field |
| PECCF_W | Write proxy for field |
| STOPCF_W | Write proxy for field |
| TIMOUTCF_W | Write proxy for field |
Enums
| ADDRCF_AW | Address matched flag clear Writing 1 to this bit clears the ADDR flag in the I2C_ISR register. Writing 1 to this bit also clears the START bit in the I2C_CR2 register. |
| ALERTCF_AW | Alert flag clear Writing 1 to this bit clears the ALERT flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
| ARLOCF_AW | Arbitration Lost flag clear Writing 1 to this bit clears the ARLO flag in the I2C_ISR register. |
| BERRCF_AW | Bus error flag clear Writing 1 to this bit clears the BERRF flag in the I2C_ISR register. |
| NACKCF_AW | Not Acknowledge flag clear Writing 1 to this bit clears the ACKF flag in I2C_ISR register. |
| OVRCF_AW | Overrun/Underrun flag clear Writing 1 to this bit clears the OVR flag in the I2C_ISR register. |
| PECCF_AW | PEC Error flag clear Writing 1 to this bit clears the PECERR flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
| STOPCF_AW | Stop detection flag clear Writing 1 to this bit clears the STOPF flag in the I2C_ISR register. |
| TIMOUTCF_AW | Timeout detection flag clear Writing 1 to this bit clears the TIMEOUT flag in the I2C_ISR register. Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
Type Definitions
| W | Writer for register ICR |