Module stm32h7xx_hal::stm32::i2c1::cr1 [−][src]
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.
Structs
| ADDRIE_W | Write proxy for field |
| ALERTEN_W | Write proxy for field |
| ANFOFF_W | Write proxy for field |
| DNF_W | Write proxy for field |
| ERRIE_W | Write proxy for field |
| GCEN_W | Write proxy for field |
| NACKIE_W | Write proxy for field |
| NOSTRETCH_W | Write proxy for field |
| PECEN_W | Write proxy for field |
| PE_W | Write proxy for field |
| RXDMAEN_W | Write proxy for field |
| RXIE_W | Write proxy for field |
| SBC_W | Write proxy for field |
| SMBDEN_W | Write proxy for field |
| SMBHEN_W | Write proxy for field |
| STOPIE_W | Write proxy for field |
| TCIE_W | Write proxy for field |
| TXDMAEN_W | Write proxy for field |
| TXIE_W | Write proxy for field |
| WUPEN_W | Write proxy for field |
Enums
| ADDRIE_A | Address match Interrupt enable (slave only) |
| ALERTEN_A | SMBus alert enable Device mode (SMBHEN=0): Host mode (SMBHEN=1): Note: When ALERTEN=0, the SMBA pin can be used as a standard GPIO. If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
| ANFOFF_A | Analog noise filter OFF Note: This bit can only be programmed when the I2C is disabled (PE = 0). |
| DNF_A | Digital noise filter These bits are used to configure the digital noise filter on SDA and SCL input. The digital filter will filter spikes with a length of up to DNF[3:0] |
| ERRIE_A | Error interrupts enable Note: Any of these errors generate an interrupt: Arbitration Loss (ARLO) Bus Error detection (BERR) Overrun/Underrun (OVR) Timeout detection (TIMEOUT) PEC error detection (PECERR) Alert pin event detection (ALERT) |
| GCEN_A | General call enable |
| NACKIE_A | Not acknowledge received Interrupt enable |
| NOSTRETCH_A | Clock stretching disable This bit is used to disable clock stretching in slave mode. It must be kept cleared in master mode. Note: This bit can only be programmed when the I2C is disabled (PE = 0). |
| PECEN_A | PEC enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
| PE_A | Peripheral enable Note: When PE=0, the I2C SCL and SDA lines are released. Internal state machines and status bits are put back to their reset value. When cleared, PE must be kept low for at least 3 APB clock cycles. |
| RXDMAEN_A | DMA reception requests enable |
| RXIE_A | RX Interrupt enable |
| SBC_A | Slave byte control This bit is used to enable hardware byte control in slave mode. |
| SMBDEN_A | SMBus Device Default address enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
| SMBHEN_A | SMBus Host address enable Note: If the SMBus feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. |
| STOPIE_A | STOP detection Interrupt enable |
| TCIE_A | Transfer Complete interrupt enable Note: Any of these events will generate an interrupt: Transfer Complete (TC) Transfer Complete Reload (TCR) |
| TXDMAEN_A | DMA transmission requests enable |
| TXIE_A | TX Interrupt enable |
| WUPEN_A | Wakeup from Stop mode enable Note: If the Wakeup from Stop mode feature is not supported, this bit is reserved and forced by hardware to 0. Please refer to Section25.3: I2C implementation. Note: WUPEN can be set only when DNF = 0000 |
Type Definitions
| ADDRIE_R | Reader of field |
| ALERTEN_R | Reader of field |
| ANFOFF_R | Reader of field |
| DNF_R | Reader of field |
| ERRIE_R | Reader of field |
| GCEN_R | Reader of field |
| NACKIE_R | Reader of field |
| NOSTRETCH_R | Reader of field |
| PECEN_R | Reader of field |
| PE_R | Reader of field |
| R | Reader of register CR1 |
| RXDMAEN_R | Reader of field |
| RXIE_R | Reader of field |
| SBC_R | Reader of field |
| SMBDEN_R | Reader of field |
| SMBHEN_R | Reader of field |
| STOPIE_R | Reader of field |
| TCIE_R | Reader of field |
| TXDMAEN_R | Reader of field |
| TXIE_R | Reader of field |
| W | Writer for register CR1 |
| WUPEN_R | Reader of field |