Module stm32h7xx_hal::stm32::fmc::sdbank::sdtr[−][src]

This register contains the timing parameters of each SDRAM bank

Structs

TMRD_W	Write proxy for field `TMRD`
TRAS_W	Write proxy for field `TRAS`
TRCD_W	Write proxy for field `TRCD`
TRC_W	Write proxy for field `TRC`
TRP_W	Write proxy for field `TRP`
TWR_W	Write proxy for field `TWR`
TXSR_W	Write proxy for field `TXSR`

Type Definitions

R	Reader of register SDTR
TMRD_R	Reader of field `TMRD`
TRAS_R	Reader of field `TRAS`
TRCD_R	Reader of field `TRCD`
TRC_R	Reader of field `TRC`
TRP_R	Reader of field `TRP`
TWR_R	Reader of field `TWR`
TXSR_R	Reader of field `TXSR`
W	Writer for register SDTR