Module stm32h7xx_hal::pac::spi1::cfg2[−][src]

configuration register 2

Structs

AFCNTR_W	Write proxy for field `AFCNTR`
COMM_W	Write proxy for field `COMM`
CPHA_W	Write proxy for field `CPHA`
CPOL_W	Write proxy for field `CPOL`
IOSWP_W	Write proxy for field `IOSWP`
LSBFRST_W	Write proxy for field `LSBFRST`
MASTER_W	Write proxy for field `MASTER`
MIDI_W	Write proxy for field `MIDI`
MSSI_W	Write proxy for field `MSSI`
SP_W	Write proxy for field `SP`
SSIOP_W	Write proxy for field `SSIOP`
SSM_W	Write proxy for field `SSM`
SSOE_W	Write proxy for field `SSOE`
SSOM_W	Write proxy for field `SSOM`

AFCNTR_A	Alternate function GPIOs control
COMM_A	SPI Communication Mode
CPHA_A	Clock phase
CPOL_A	Clock polarity
IOSWP_A	Swap functionality of MISO and MOSI pins
LSBFRST_A	Data frame format
MASTER_A	SPI Master
SP_A	Serial Protocol
SSIOP_A	SS input/output polarity
SSM_A	Software management of SS signal input
SSOE_A	SS output enable
SSOM_A	SS output management in master mode