Type Definition stm32h7xx_hal::pac::i2c1::OAR2

type OAR2 = Reg<u32, _OAR2>;

Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see oar2 module