Module stm32h7xx_hal::pac::bdma::ch [−][src]
Register block Channel cluster: CCR?, CNDTR?, CPAR?, CM0AR? and CM1AR? registers
Modules
| cr | DMA channel x configuration register |
| m0ar | This register must not be written when the channel is enabled. |
| m1ar | Channel x memory 1 address register |
| ndtr | DMA channel x number of data register |
| par | This register must not be written when the channel is enabled. |
Type Definitions
| CR | DMA channel x configuration register |
| M0AR | This register must not be written when the channel is enabled. |
| M1AR | Channel x memory 1 address register |
| NDTR | DMA channel x number of data register |
| PAR | This register must not be written when the channel is enabled. |