Module stm32h7xx_hal::device::tim4 [−][src]
General purpose timers
Modules
| af1 | TIM alternate function option register 1 |
| arr | auto-reload register |
| ccer | capture/compare enable register |
| ccmr1_input | capture/compare mode register 1 (input mode) |
| ccmr1_output | capture/compare mode register 1 (output mode) |
| ccmr2_input | capture/compare mode register 2 (input mode) |
| ccmr2_output | capture/compare mode register 2 (output mode) |
| ccr | capture/compare register 1 |
| cnt | counter |
| cr1 | control register 1 |
| cr2 | control register 2 |
| dcr | DMA control register |
| dier | DMA/Interrupt enable register |
| dmar | DMA address for full transfer |
| egr | event generation register |
| psc | prescaler |
| smcr | slave mode control register |
| sr | status register |
| tisel | TIM timer input selection register |
Structs
| RegisterBlock | Register block |
Type Definitions
| AF1 | TIM alternate function option register 1 |
| ARR | auto-reload register |
| CCER | capture/compare enable register |
| CCMR1_INPUT | capture/compare mode register 1 (input mode) |
| CCMR1_OUTPUT | capture/compare mode register 1 (output mode) |
| CCMR2_INPUT | capture/compare mode register 2 (input mode) |
| CCMR2_OUTPUT | capture/compare mode register 2 (output mode) |
| CCR | capture/compare register 1 |
| CNT | counter |
| CR1 | control register 1 |
| CR2 | control register 2 |
| DCR | DMA control register |
| DIER | DMA/Interrupt enable register |
| DMAR | DMA address for full transfer |
| EGR | event generation register |
| PSC | prescaler |
| SMCR | slave mode control register |
| SR | status register |
| TISEL | TIM timer input selection register |