Module stm32h7xx_hal::device::dma2d::fgpfccr[−][src]

DMA2D foreground PFC control register

Structs

AI_A	Alpha Inverted This bit inverts the alpha value. Once the transfer has started, this bit is read-only.
AM_A	Alpha mode These bits select the alpha channel value to be used for the foreground image. They can only be written data the transfer are disabled. Once the transfer has started, they become read-only. other configurations are meaningless
CCM_A	CLUT color mode This bit defines the color format of the CLUT. It can only be written when the transfer is disabled. Once the CLUT transfer has started, this bit is read-only.
CM_A	Color mode These bits defines the color format of the foreground image. They can only be written when data transfers are disabled. Once the transfer has started, they are read-only. others: meaningless
RBS_A	Red Blue Swap This bit allows to swap the R & B to support BGR or ABGR color formats. Once the transfer has started, this bit is read-only.
START_A	Start This bit can be set to start the automatic loading of the CLUT. It is automatically reset: at the end of the transfer when the transfer is aborted by the user application by setting the ABORT bit in DMA2D_CR when a transfer error occurs when the transfer has not started due to a configuration error or another transfer operation already ongoing (data transfer or automatic background CLUT transfer).