Struct stm32h7xx_hal::pac::fdcan1::ttils::W

pub struct W(/* private fields */);

Register TTILS writer

Implementations

impl W

pub fn sbcl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 0>

Bit 0 - Start of Basic Cycle Interrupt Line

pub fn smcl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 1>

Bit 1 - Start of Matrix Cycle Interrupt Line

pub fn csml(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 2>

Bit 2 - Change of Synchronization Mode Interrupt Line

pub fn sogl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 3>

Bit 3 - Start of Gap Interrupt Line

pub fn rtmil(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 4>

Bit 4 - Register Time Mark Interrupt Line

pub fn ttmil(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 5>

Bit 5 - Trigger Time Mark Event Internal Interrupt Line

pub fn swel(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 6>

Bit 6 - Stop Watch Event Interrupt Line

pub fn gtwl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 7>

Bit 7 - Global Time Wrap Interrupt Line

pub fn gtdl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 8>

Bit 8 - Global Time Discontinuity Interrupt Line

pub fn gtel(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 9>

Bit 9 - Global Time Error Interrupt Line

pub fn txul(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 10>

Bit 10 - Tx Count Underflow Interrupt Line

pub fn txol(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 11>

Bit 11 - Tx Count Overflow Interrupt Line

pub fn se1l(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 12>

Bit 12 - Scheduling Error 1 Interrupt Line

pub fn se2l(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 13>

Bit 13 - Scheduling Error 2 Interrupt Line

pub fn elcl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 14>

Bit 14 - Change Error Level Interrupt Line

pub fn iwtgl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 15>

Bit 15 - Initialization Watch Trigger Interrupt Line

pub fn wtl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 16>

Bit 16 - Watch Trigger Interrupt Line

pub fn awl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 17>

Bit 17 - Application Watchdog Interrupt Line

pub fn cerl(&mut self) -> BitWriterRaw<'_, u32, TTILS_SPEC, bool, BitM, 18>

Bit 18 - Configuration Error Interrupt Line

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<TTILS_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<TTILS_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<TTILS_SPEC>> for W

fn from(writer: W<TTILS_SPEC>) -> W

Converts to this type from the input type.