Module stm32h7xx_hal::spi
source · [−]Expand description
Serial Peripheral Interface (SPI)
This module implements the embedded-hal traits for master mode SPI.
Usage
In the simplest case, SPI can be initialised from the device peripheral and the GPIO pins.
use stm32h7xx_hal::spi;
let dp = ...; // Device peripherals
let (sck, miso, mosi) = ...; // GPIO pins
let spi = dp.SPI1.spi((sck, miso, mosi), spi::MODE_0, 1.MHz(), ccdr.peripheral.SPI1, &ccdr.clocks);
The GPIO pins should be supplied as a tuple in the following order:
- Serial Clock (SCK)
- Master In Slave Out (MISO)
- Master Out Slave In (MOSI)
If one of the pins is not required, explicitly pass one of the filler types instead:
let spi = dp.SPI1.spi((sck, spi::NoMiso, mosi), spi::MODE_0, 1.MHz(), ccdr.peripheral.SPI1, &ccdr.clocks);
Word Sizes
The word size used by the SPI controller must be indicated to the
compiler. This can be done either using an explicit type
annotation, or with a type hint. The possible word sizes are 8
bits (u8
) or 16 bits (u16
).
For example, an explict type annotation:
let _: spi:Spi<_, _, u8> = dp.SPI1.spi((sck, spi::NoMiso, mosi), spi::MODE_0, 1.MHz(), ccdr.peripheral.SPI1, &ccdr.clocks);
Clocks
The bitrate calculation is based upon the clock currently assigned in the RCC CCIP register. The default assignments are:
- SPI1, SPI2, SPI3: PLL1 Q CK
- SPI4, SPI5: APB
- SPI6: PCLK4
Examples
Structs
A structure for specifying SPI configuration.
Disabled SPI peripheral (type state)
Enabled SPI peripheral (type state)
Object containing the settings for the hardware chip select pin
SPI mode
A filler type for when the Miso pin is unnecessary
A filler type for when the Mosi pin is unnecessary
A filler type for when the SCK pin is unnecessary
Enums
Specifies the communication mode of the SPI interface.
SPI error
Interrupt events
Clock phase
Clock polarity
Constants
Helper for CPOL = 0, CPHA = 0
Helper for CPOL = 0, CPHA = 1
Helper for CPOL = 1, CPHA = 0
Helper for CPOL = 1, CPHA = 1