Struct stm32h7x3::ethernet_mac::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub dmamr: DMAMR,
    pub dmasbmr: DMASBMR,
    pub dmaisr: DMAISR,
    pub dmadsr: DMADSR,
    pub dmaccr: DMACCR,
    pub dmactx_cr: DMACTXCR,
    pub dmacrx_cr: DMACRXCR,
    pub dmactx_dlar: DMACTXDLAR,
    pub dmacrx_dlar: DMACRXDLAR,
    pub dmactx_dtpr: DMACTXDTPR,
    pub dmacrx_dtpr: DMACRXDTPR,
    pub dmactx_rlr: DMACTXRLR,
    pub dmacrx_rlr: DMACRXRLR,
    pub dmacier: DMACIER,
    pub dmacrx_iwtr: DMACRXIWTR,
    pub dmaccatx_dr: DMACCATXDR,
    pub dmaccarx_dr: DMACCARXDR,
    pub dmaccatx_br: DMACCATXBR,
    pub dmaccarx_br: DMACCARXBR,
    pub dmacsr: DMACSR,
    pub dmacmfcr: DMACMFCR,
    // some fields omitted
}

Register block

Fields

dmamr: DMAMR

0x00 - DMA mode register

dmasbmr: DMASBMR

0x04 - System bus mode register

dmaisr: DMAISR

0x08 - Interrupt status register

dmadsr: DMADSR

0x0c - Debug status register

dmaccr: DMACCR

0x100 - Channel control register

dmactx_cr: DMACTXCR

0x104 - Channel transmit control register

dmacrx_cr: DMACRXCR

0x108 - Channel receive control register

dmactx_dlar: DMACTXDLAR

0x114 - Channel Tx descriptor list address register

dmacrx_dlar: DMACRXDLAR

0x11c - Channel Rx descriptor list address register

dmactx_dtpr: DMACTXDTPR

0x120 - Channel Tx descriptor tail pointer register

dmacrx_dtpr: DMACRXDTPR

0x128 - Channel Rx descriptor tail pointer register

dmactx_rlr: DMACTXRLR

0x12c - Channel Tx descriptor ring length register

dmacrx_rlr: DMACRXRLR

0x130 - Channel Rx descriptor ring length register

dmacier: DMACIER

0x134 - Channel interrupt enable register

dmacrx_iwtr: DMACRXIWTR

0x138 - Channel Rx interrupt watchdog timer register

dmaccatx_dr: DMACCATXDR

0x144 - Channel current application transmit descriptor register

dmaccarx_dr: DMACCARXDR

0x14c - Channel current application receive descriptor register

dmaccatx_br: DMACCATXBR

0x154 - Channel current application transmit buffer register

dmaccarx_br: DMACCARXBR

0x15c - Channel current application receive buffer register

dmacsr: DMACSR

0x160 - Channel status register

dmacmfcr: DMACMFCR

0x16c - Channel missed frame count register