Struct stm32h7x3::adc3::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub isr: ISR, pub ier: IER, pub cr: CR, pub cfgr: CFGR, pub cfgr2: CFGR2, pub smpr1: SMPR1, pub smpr2: SMPR2, pub pcsel: PCSEL, pub ltr1: LTR1, pub lhtr1: LHTR1, pub sqr1: SQR1, pub sqr2: SQR2, pub sqr3: SQR3, pub sqr4: SQR4, pub dr: DR, pub jsqr: JSQR, pub ofr1: OFR1, pub ofr2: OFR2, pub ofr3: OFR3, pub ofr4: OFR4, pub jdr1: JDR1, pub jdr2: JDR2, pub jdr3: JDR3, pub jdr4: JDR4, pub awd2cr: AWD2CR, pub awd3cr: AWD3CR, pub ltr2: LTR2, pub htr2: HTR2, pub ltr3: LTR3, pub htr3: HTR3, pub difsel: DIFSEL, pub calfact: CALFACT, pub calfact2: CALFACT2, // some fields omitted }
Register block
Fields
isr: ISR
0x00 - ADC interrupt and status register
ier: IER
0x04 - ADC interrupt enable register
cr: CR
0x08 - ADC control register
cfgr: CFGR
0x0c - ADC configuration register 1
cfgr2: CFGR2
0x10 - ADC configuration register 2
smpr1: SMPR1
0x14 - ADC sampling time register 1
smpr2: SMPR2
0x18 - ADC sampling time register 2
pcsel: PCSEL
0x1c - ADC pre channel selection register
ltr1: LTR1
0x20 - ADC analog watchdog 1 threshold register
lhtr1: LHTR1
0x24 - ADC analog watchdog 2 threshold register
sqr1: SQR1
0x30 - ADC group regular sequencer ranks register 1
sqr2: SQR2
0x34 - ADC group regular sequencer ranks register 2
sqr3: SQR3
0x38 - ADC group regular sequencer ranks register 3
sqr4: SQR4
0x3c - ADC group regular sequencer ranks register 4
dr: DR
0x40 - ADC group regular conversion data register
jsqr: JSQR
0x4c - ADC group injected sequencer register
ofr1: OFR1
0x60 - ADC offset number 1 register
ofr2: OFR2
0x64 - ADC offset number 2 register
ofr3: OFR3
0x68 - ADC offset number 3 register
ofr4: OFR4
0x6c - ADC offset number 4 register
jdr1: JDR1
0x80 - ADC group injected sequencer rank 1 register
jdr2: JDR2
0x84 - ADC group injected sequencer rank 2 register
jdr3: JDR3
0x88 - ADC group injected sequencer rank 3 register
jdr4: JDR4
0x8c - ADC group injected sequencer rank 4 register
awd2cr: AWD2CR
0xa0 - ADC analog watchdog 2 configuration register
awd3cr: AWD3CR
0xa4 - ADC analog watchdog 3 configuration register
ltr2: LTR2
0xb0 - ADC watchdog lower threshold register 2
htr2: HTR2
0xb4 - ADC watchdog higher threshold register 2
ltr3: LTR3
0xb8 - ADC watchdog lower threshold register 3
htr3: HTR3
0xbc - ADC watchdog higher threshold register 3
difsel: DIFSEL
0xc0 - ADC channel differential or single-ended mode selection register
calfact: CALFACT
0xc4 - ADC calibration factors register
calfact2: CALFACT2
0xc8 - ADC Calibration Factor register 2