Struct stm32h7x3::Peripherals

pub struct Peripherals<'a> {
    pub CPUID: &'a CPUID,
    pub DCB: &'a DCB,
    pub DWT: &'a DWT,
    pub FPB: &'a FPB,
    pub FPU: &'a FPU,
    pub ITM: &'a ITM,
    pub MPU: &'a MPU,
    pub NVIC: &'a NVIC,
    pub SCB: &'a SCB,
    pub SYST: &'a SYST,
    pub TPIU: &'a TPIU,
    pub COMP1: &'a COMP1,
    pub CRS: &'a CRS,
    pub DAC: &'a DAC,
    pub BDMA: &'a BDMA,
    pub DMA2D: &'a DMA2D,
    pub DMAMUX2: &'a DMAMUX2,
    pub FMC: &'a FMC,
    pub CEC: &'a CEC,
    pub HSEM: &'a HSEM,
    pub I2C1: &'a I2C1,
    pub I2C2: &'a I2C2,
    pub I2C3: &'a I2C3,
    pub I2C4: &'a I2C4,
    pub GPIOA: &'a GPIOA,
    pub GPIOB: &'a GPIOB,
    pub GPIOC: &'a GPIOC,
    pub GPIOD: &'a GPIOD,
    pub GPIOE: &'a GPIOE,
    pub GPIOF: &'a GPIOF,
    pub GPIOG: &'a GPIOG,
    pub GPIOH: &'a GPIOH,
    pub GPIOI: &'a GPIOI,
    pub GPIOJ: &'a GPIOJ,
    pub GPIOK: &'a GPIOK,
    pub JPEG: &'a JPEG,
    pub MDMA: &'a MDMA,
    pub QUADSPI: &'a QUADSPI,
    pub RNG: &'a RNG,
    pub RTC: &'a RTC,
    pub SAI4: &'a SAI4,
    pub SAI1: &'a SAI1,
    pub SAI2: &'a SAI2,
    pub SAI3: &'a SAI3,
    pub SDMMC1: &'a SDMMC1,
    pub SDMMC2: &'a SDMMC2,
    pub VREFBUF: &'a VREFBUF,
    pub IWDG: &'a IWDG,
    pub WWDG: &'a WWDG,
    pub PWR: &'a PWR,
    pub SPI1: &'a SPI1,
    pub SPI2: &'a SPI2,
    pub SPI3: &'a SPI3,
    pub SPI4: &'a SPI4,
    pub SPI5: &'a SPI5,
    pub SPI6: &'a SPI6,
    pub LTDC: &'a LTDC,
    pub SPDIFRX: &'a SPDIFRX,
    pub ADC3: &'a ADC3,
    pub ADC1: &'a ADC1,
    pub ADC2: &'a ADC2,
    pub ADC3_COMMON: &'a ADC3_COMMON,
    pub ADC12_COMMON: &'a ADC12_COMMON,
    pub DMAMUX1: &'a DMAMUX1,
    pub CRC: &'a CRC,
    pub RCC: &'a RCC,
    pub LPTIM1: &'a LPTIM1,
    pub LPTIM2: &'a LPTIM2,
    pub LPTIM3: &'a LPTIM3,
    pub LPTIM4: &'a LPTIM4,
    pub LPTIM5: &'a LPTIM5,
    pub LPUART1: &'a LPUART1,
    pub SYSCFG: &'a SYSCFG,
    pub EXTI: &'a EXTI,
    pub DELAY_BLOCK_SDMMC1: &'a DELAY_BLOCK_SDMMC1,
    pub DELAY_BLOCK_QUADSPI: &'a DELAY_BLOCK_QUADSPI,
    pub DELAY_BLOCK_SDMMC2: &'a DELAY_BLOCK_SDMMC2,
    pub FLASH: &'a FLASH,
    pub AXI: &'a AXI,
    pub HASH: &'a HASH,
    pub CRYP: &'a CRYP,
    pub DCMI: &'a DCMI,
    pub OTG1_HS_GLOBAL: &'a OTG1_HS_GLOBAL,
    pub OTG2_HS_GLOBAL: &'a OTG2_HS_GLOBAL,
    pub OTG1_HS_HOST: &'a OTG1_HS_HOST,
    pub OTG2_HS_HOST: &'a OTG2_HS_HOST,
    pub OTG1_HS_DEVICE: &'a OTG1_HS_DEVICE,
    pub OTG2_HS_DEVICE: &'a OTG2_HS_DEVICE,
    pub OTG1_HS_PWRCLK: &'a OTG1_HS_PWRCLK,
    pub OTG2_HS_PWRCLK: &'a OTG2_HS_PWRCLK,
    pub ETHERNET_MAC: &'a ETHERNET_MAC,
    pub DMA1: &'a DMA1,
    pub DMA2: &'a DMA2,
    pub HRTIM_MASTER: &'a HRTIM_MASTER,
    pub HRTIM_TIMA: &'a HRTIM_TIMA,
    pub HRTIM_TIMB: &'a HRTIM_TIMB,
    pub HRTIM_TIMC: &'a HRTIM_TIMC,
    pub HRTIM_TIMD: &'a HRTIM_TIMD,
    pub HRTIM_TIME: &'a HRTIM_TIME,
    pub HRTIM_COMMON: &'a HRTIM_COMMON,
    pub DFSDM: &'a DFSDM,
    pub TIM16: &'a TIM16,
    pub TIM17: &'a TIM17,
    pub TIM15: &'a TIM15,
    pub USART1: &'a USART1,
    pub USART2: &'a USART2,
    pub USART3: &'a USART3,
    pub UART4: &'a UART4,
    pub UART5: &'a UART5,
    pub USART6: &'a USART6,
    pub UART7: &'a UART7,
    pub UART8: &'a UART8,
    pub TIM1: &'a TIM1,
    pub TIM8: &'a TIM8,
    pub FDCAN1: &'a FDCAN1,
    pub FDCAN2: &'a FDCAN2,
    pub CAN_MSG_RAM: &'a CAN_MSG_RAM,
    pub CAN_CCU: &'a CAN_CCU,
    pub MDIOS: &'a MDIOS,
    pub OPAMP: &'a OPAMP,
    pub SWPMI: &'a SWPMI,
    pub TIM2: &'a TIM2,
    pub TIM3: &'a TIM3,
    pub TIM4: &'a TIM4,
    pub TIM5: &'a TIM5,
    pub TIM12: &'a TIM12,
    pub TIM13: &'a TIM13,
    pub TIM14: &'a TIM14,
    pub TIM6: &'a TIM6,
    pub TIM7: &'a TIM7,
    pub STK: &'a STK,
    pub NVIC_STIR: &'a NVIC_STIR,
    pub FPU_CPACR: &'a FPU_CPACR,
    pub SCB_ACTRL: &'a SCB_ACTRL,
    pub PF: &'a PF,
    pub AC: &'a AC,
}

All the peripherals

Fields

CPUID: &'a CPUID

CPUID

DCB: &'a DCB

DCB

DWT: &'a DWT

DWT

FPB: &'a FPB

FPB

FPU: &'a FPU

FPU

ITM: &'a ITM

ITM

MPU: &'a MPU

MPU

NVIC: &'a NVIC

NVIC

SCB: &'a SCB

SCB

SYST: &'a SYST

SYST

TPIU: &'a TPIU

TPIU

COMP1: &'a COMP1

COMP1

CRS: &'a CRS

CRS

DAC: &'a DAC

DAC

BDMA: &'a BDMA

BDMA

DMA2D: &'a DMA2D

DMA2D

DMAMUX2: &'a DMAMUX2

DMAMUX2

FMC: &'a FMC

FMC

CEC: &'a CEC

CEC

HSEM: &'a HSEM

HSEM

I2C1: &'a I2C1

I2C1

I2C2: &'a I2C2

I2C2

I2C3: &'a I2C3

I2C3

I2C4: &'a I2C4

I2C4

GPIOA: &'a GPIOA

GPIOA

GPIOB: &'a GPIOB

GPIOB

GPIOC: &'a GPIOC

GPIOC

GPIOD: &'a GPIOD

GPIOD

GPIOE: &'a GPIOE

GPIOE

GPIOF: &'a GPIOF

GPIOF

GPIOG: &'a GPIOG

GPIOG

GPIOH: &'a GPIOH

GPIOH

GPIOI: &'a GPIOI

GPIOI

GPIOJ: &'a GPIOJ

GPIOJ

GPIOK: &'a GPIOK

GPIOK

JPEG: &'a JPEG

JPEG

MDMA: &'a MDMA

MDMA

QUADSPI: &'a QUADSPI

QUADSPI

RNG: &'a RNG

RNG

RTC: &'a RTC

RTC

SAI4: &'a SAI4

SAI4

SAI1: &'a SAI1

SAI1

SAI2: &'a SAI2

SAI2

SAI3: &'a SAI3

SAI3

SDMMC1: &'a SDMMC1

SDMMC1

SDMMC2: &'a SDMMC2

SDMMC2

VREFBUF: &'a VREFBUF

VREFBUF

IWDG: &'a IWDG

IWDG

WWDG: &'a WWDG

WWDG

PWR: &'a PWR

PWR

SPI1: &'a SPI1

SPI1

SPI2: &'a SPI2

SPI2

SPI3: &'a SPI3

SPI3

SPI4: &'a SPI4

SPI4

SPI5: &'a SPI5

SPI5

SPI6: &'a SPI6

SPI6

LTDC: &'a LTDC

LTDC

SPDIFRX: &'a SPDIFRX

SPDIFRX

ADC3: &'a ADC3

ADC3

ADC1: &'a ADC1

ADC1

ADC2: &'a ADC2

ADC2

ADC3_COMMON: &'a ADC3_COMMON

ADC3_COMMON

ADC12_COMMON: &'a ADC12_COMMON

ADC12_COMMON

DMAMUX1: &'a DMAMUX1

DMAMUX1

CRC: &'a CRC

CRC

RCC: &'a RCC

RCC

LPTIM1: &'a LPTIM1

LPTIM1

LPTIM2: &'a LPTIM2

LPTIM2

LPTIM3: &'a LPTIM3

LPTIM3

LPTIM4: &'a LPTIM4

LPTIM4

LPTIM5: &'a LPTIM5

LPTIM5

LPUART1: &'a LPUART1

LPUART1

SYSCFG: &'a SYSCFG

SYSCFG

EXTI: &'a EXTI

EXTI

DELAY_BLOCK_SDMMC1: &'a DELAY_BLOCK_SDMMC1

DELAY_BLOCK_SDMMC1

DELAY_BLOCK_QUADSPI: &'a DELAY_BLOCK_QUADSPI

DELAY_BLOCK_QUADSPI

DELAY_BLOCK_SDMMC2: &'a DELAY_BLOCK_SDMMC2

DELAY_BLOCK_SDMMC2

FLASH: &'a FLASH

FLASH

AXI: &'a AXI

AXI

HASH: &'a HASH

HASH

CRYP: &'a CRYP

CRYP

DCMI: &'a DCMI

DCMI

OTG1_HS_GLOBAL: &'a OTG1_HS_GLOBAL

OTG1_HS_GLOBAL

OTG2_HS_GLOBAL: &'a OTG2_HS_GLOBAL

OTG2_HS_GLOBAL

OTG1_HS_HOST: &'a OTG1_HS_HOST

OTG1_HS_HOST

OTG2_HS_HOST: &'a OTG2_HS_HOST

OTG2_HS_HOST

OTG1_HS_DEVICE: &'a OTG1_HS_DEVICE

OTG1_HS_DEVICE

OTG2_HS_DEVICE: &'a OTG2_HS_DEVICE

OTG2_HS_DEVICE

OTG1_HS_PWRCLK: &'a OTG1_HS_PWRCLK

OTG1_HS_PWRCLK

OTG2_HS_PWRCLK: &'a OTG2_HS_PWRCLK

OTG2_HS_PWRCLK

ETHERNET_MAC: &'a ETHERNET_MAC

ETHERNET_MAC

DMA1: &'a DMA1

DMA1

DMA2: &'a DMA2

DMA2

HRTIM_MASTER: &'a HRTIM_MASTER

HRTIM_MASTER

HRTIM_TIMA: &'a HRTIM_TIMA

HRTIM_TIMA

HRTIM_TIMB: &'a HRTIM_TIMB

HRTIM_TIMB

HRTIM_TIMC: &'a HRTIM_TIMC

HRTIM_TIMC

HRTIM_TIMD: &'a HRTIM_TIMD

HRTIM_TIMD

HRTIM_TIME: &'a HRTIM_TIME

HRTIM_TIME

HRTIM_COMMON: &'a HRTIM_COMMON

HRTIM_COMMON

DFSDM: &'a DFSDM

DFSDM

TIM16: &'a TIM16

TIM16

TIM17: &'a TIM17

TIM17

TIM15: &'a TIM15

TIM15

USART1: &'a USART1

USART1

USART2: &'a USART2

USART2

USART3: &'a USART3

USART3

UART4: &'a UART4

UART4

UART5: &'a UART5

UART5

USART6: &'a USART6

USART6

UART7: &'a UART7

UART7

UART8: &'a UART8

UART8

TIM1: &'a TIM1

TIM1

TIM8: &'a TIM8

TIM8

FDCAN1: &'a FDCAN1

FDCAN1

FDCAN2: &'a FDCAN2

FDCAN2

CAN_MSG_RAM: &'a CAN_MSG_RAM

CAN_MSG_RAM

CAN_CCU: &'a CAN_CCU

CAN_CCU

MDIOS: &'a MDIOS

MDIOS

OPAMP: &'a OPAMP

OPAMP

SWPMI: &'a SWPMI

SWPMI

TIM2: &'a TIM2

TIM2

TIM3: &'a TIM3

TIM3

TIM4: &'a TIM4

TIM4

TIM5: &'a TIM5

TIM5

TIM12: &'a TIM12

TIM12

TIM13: &'a TIM13

TIM13

TIM14: &'a TIM14

TIM14

TIM6: &'a TIM6

TIM6

TIM7: &'a TIM7

TIM7

STK: &'a STK

STK

NVIC_STIR: &'a NVIC_STIR

NVIC_STIR

FPU_CPACR: &'a FPU_CPACR

FPU_CPACR

SCB_ACTRL: &'a SCB_ACTRL

SCB_ACTRL

PF: &'a PF

PF

AC: &'a AC

AC

Methods

impl<'a> Peripherals<'a>

unsafe fn all() -> Self

Grants access to all the peripherals