Struct stm32h7x3::hrtim_tima::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub timacr: TIMACR, pub timaisr: TIMAISR, pub timaicr: TIMAICR, pub timadier5: TIMADIER5, pub cntar: CNTAR, pub perar: PERAR, pub repar: REPAR, pub cmp1ar: CMP1AR, pub cmp1car: CMP1CAR, pub cmp2ar: CMP2AR, pub cmp3ar: CMP3AR, pub cmp4ar: CMP4AR, pub cpt1ar: CPT1AR, pub cpt2ar: CPT2AR, pub dtar: DTAR, pub seta1r: SETA1R, pub rsta1r: RSTA1R, pub seta2r: SETA2R, pub rsta2r: RSTA2R, pub eefar1: EEFAR1, pub eefar2: EEFAR2, pub rstar: RSTAR, pub chpar: CHPAR, pub cpt1acr: CPT1ACR, pub cpt2acr: CPT2ACR, pub outar: OUTAR, pub fltar: FLTAR, }
Register block
Fields
timacr: TIMACR
0x00 - Timerx Control Register
timaisr: TIMAISR
0x04 - Timerx Interrupt Status Register
timaicr: TIMAICR
0x08 - Timerx Interrupt Clear Register
timadier5: TIMADIER5
0x0c - TIMxDIER5
cntar: CNTAR
0x10 - Timerx Counter Register
perar: PERAR
0x14 - Timerx Period Register
repar: REPAR
0x18 - Timerx Repetition Register
cmp1ar: CMP1AR
0x1c - Timerx Compare 1 Register
cmp1car: CMP1CAR
0x20 - Timerx Compare 1 Compound Register
cmp2ar: CMP2AR
0x24 - Timerx Compare 2 Register
cmp3ar: CMP3AR
0x28 - Timerx Compare 3 Register
cmp4ar: CMP4AR
0x2c - Timerx Compare 4 Register
cpt1ar: CPT1AR
0x30 - Timerx Capture 1 Register
cpt2ar: CPT2AR
0x34 - Timerx Capture 2 Register
dtar: DTAR
0x38 - Timerx Deadtime Register
seta1r: SETA1R
0x3c - Timerx Output1 Set Register
rsta1r: RSTA1R
0x40 - Timerx Output1 Reset Register
seta2r: SETA2R
0x44 - Timerx Output2 Set Register
rsta2r: RSTA2R
0x48 - Timerx Output2 Reset Register
eefar1: EEFAR1
0x4c - Timerx External Event Filtering Register 1
eefar2: EEFAR2
0x50 - Timerx External Event Filtering Register 2
rstar: RSTAR
0x54 - TimerA Reset Register
chpar: CHPAR
0x58 - Timerx Chopper Register
cpt1acr: CPT1ACR
0x5c - Timerx Capture 2 Control Register
cpt2acr: CPT2ACR
0x60 - CPT2xCR
outar: OUTAR
0x64 - Timerx Output Register
fltar: FLTAR
0x68 - Timerx Fault Register