Module stm32h743::i2c1
[−]
[src]
I2C
Modules
i2c_cr1 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
i2c_cr2 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
i2c_icr |
Access: No wait states |
i2c_isr |
Access: No wait states |
i2c_oar1 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
i2c_oar2 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
i2c_pecr |
Access: No wait states |
i2c_rxdr |
Access: No wait states |
i2c_timeoutr |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
i2c_timingr |
Access: No wait states |
i2c_txdr |
Access: No wait states |
Structs
I2C_CR1 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
I2C_CR2 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
I2C_ICR |
Access: No wait states |
I2C_ISR |
Access: No wait states |
I2C_OAR1 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
I2C_OAR2 |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
I2C_PECR |
Access: No wait states |
I2C_RXDR |
Access: No wait states |
I2C_TIMEOUTR |
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK. |
I2C_TIMINGR |
Access: No wait states |
I2C_TXDR |
Access: No wait states |
RegisterBlock |
Register block |