Expand description
Peripheral access API for STM32H743 microcontrollers (generated using svd2rust v0.24.1 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports
pub use self::Interrupt as interrupt;pub use i2c1 as i2c2;pub use i2c1 as i2c3;pub use i2c1 as i2c4;pub use gpioa as gpiob;pub use gpioa as gpioc;pub use gpioa as gpiod;pub use gpioa as gpioe;pub use gpioa as gpiof;pub use gpioa as gpiog;pub use gpioa as gpioh;pub use gpioa as gpioi;pub use gpioa as gpioj;pub use gpioa as gpiok;pub use sai4 as sai1;pub use sai4 as sai2;pub use sai4 as sai3;pub use sdmmc1 as sdmmc2;pub use spi1 as spi2;pub use spi1 as spi3;pub use spi1 as spi4;pub use spi1 as spi5;pub use spi1 as spi6;pub use adc3 as adc1;pub use adc3 as adc2;pub use adc3_common as adc12_common;pub use lptim1 as lptim2;pub use lptim3 as lptim4;pub use lptim3 as lptim5;pub use delay_block_sdmmc1 as delay_block_quadspi;pub use delay_block_sdmmc1 as delay_block_sdmmc2;pub use otg1_hs_global as otg2_hs_global;pub use otg1_hs_host as otg2_hs_host;pub use otg1_hs_device as otg2_hs_device;pub use otg1_hs_pwrclk as otg2_hs_pwrclk;pub use usart1 as usart2;pub use usart1 as usart3;pub use usart1 as uart4;pub use usart1 as uart5;pub use usart1 as usart6;pub use usart1 as uart7;pub use usart1 as uart8;pub use tim1 as tim8;pub use fdcan1 as fdcan2;pub use tim3 as tim4;pub use tim2 as tim5;pub use tim13 as tim14;pub use tim6 as tim7;pub use dma1 as dma2;pub use ramecc1 as ramecc2;Modules
Access control
Analog to Digital Converter
Analog-to-Digital Converter
AXI interconnect registers
BDMA
CCU registers
CEC
COMP1
Cryptographic processor
CRS
DAC
Microcontroller Debug Unit
Digital camera interface
DELAY_Block_SDMMC1
Digital filter for sigma delta modulators
DMA controller
DMA2D
DMAMUX
DMAMUX
Ethernet: DMA mode register (DMA)
Ethernet: media access control (MAC)
Ethernet: MTL mode register (MTL)
External interrupt/event controller
FDCAN1
Flash
FMC
Floating point unit CPACR
GPIO
High Resolution Timer: Common functions
High Resolution Timer: Master Timers
High Resolution Timer: TIMA
High Resolution Timer: TIMB
High Resolution Timer: TIMC
High Resolution Timer: TIMD
High Resolution Timer: TIME
HSEM
I2C
IWDG
JPEG
Low power timer
Low power timer
LPUART1
LCD-TFT Controller
Management data input/output slave
MDMA
Nested vectored interrupt controller
Operational amplifiers
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
Processor features
PWR
QUADSPI
RAM ECC monitoring
RAM ECC monitoring
Reset and clock control
RNG
RTC
SAI
System control block ACTLR
SDMMC1
Receiver Interface
Serial peripheral interface
SysTick timer
Single Wire Protocol Master Interface
System configuration controller
Advanced-timers
General purpose timers
General purpose timers
Basic timers
General purpose timers
General purpose timers
General purpose timers
General-purpose-timers
General-purpose-timers
Universal synchronous asynchronous receiver transmitter
VREFBUF
WWDG
Structs
Access control
Analog to Digital Converter
Analog to Digital Converter
Analog to Digital Converter
Analog-to-Digital Converter
Analog-to-Digital Converter
AXI interconnect registers
BDMA
CCU registers
Cache and branch predictor maintenance operations
CEC
COMP1
CPUID
Cryptographic processor
CRS
Core peripherals
DAC
Microcontroller Debug Unit
Debug Control Block
Digital camera interface
DELAY_Block_SDMMC1
DELAY_Block_SDMMC1
DELAY_Block_SDMMC1
Digital filter for sigma delta modulators
DMA controller
DMA controller
DMA2D
DMAMUX
DMAMUX
Data Watchpoint and Trace unit
Ethernet: DMA mode register (DMA)
Ethernet: media access control (MAC)
Ethernet: MTL mode register (MTL)
External interrupt/event controller
FDCAN1
FDCAN1
Flash
FMC
Flash Patch and Breakpoint unit
Floating Point Unit
Floating point unit CPACR
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
High Resolution Timer: Common functions
High Resolution Timer: Master Timers
High Resolution Timer: TIMA
High Resolution Timer: TIMB
High Resolution Timer: TIMC
High Resolution Timer: TIMD
High Resolution Timer: TIME
HSEM
I2C
I2C
I2C
I2C
Instrumentation Trace Macrocell
IWDG
JPEG
Low power timer
Low power timer
Low power timer
Low power timer
Low power timer
LPUART1
LCD-TFT Controller
Management data input/output slave
MDMA
Memory Protection Unit
Nested Vector Interrupt Controller
Nested vectored interrupt controller
Operational amplifiers
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
USB 1 on the go high speed
Processor features
PWR
All the peripherals
QUADSPI
RAM ECC monitoring
RAM ECC monitoring
RAM ECC monitoring
Reset and clock control
RNG
RTC
SAI
SAI
SAI
SAI
System Control Block
System control block ACTLR
SDMMC1
SDMMC1
Receiver Interface
Serial peripheral interface
Serial peripheral interface
Serial peripheral interface
Serial peripheral interface
Serial peripheral interface
Serial peripheral interface
SysTick timer
Single Wire Protocol Master Interface
System configuration controller
SysTick: System Timer
Advanced-timers
General purpose timers
General purpose timers
General purpose timers
General purpose timers
Basic timers
Basic timers
Advanced-timers
General purpose timers
General purpose timers
General purpose timers
General purpose timers
General-purpose-timers
General-purpose-timers
Trace Port Interface Unit
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
Universal synchronous asynchronous receiver transmitter
VREFBUF
WWDG
Enums
Enumeration of all the interrupts.
Constants
Number available in the NVIC for configuring priority