1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
#[doc = "Register `D3AMR` reader"]
pub struct R(crate::R<D3AMR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<D3AMR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<D3AMR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<D3AMR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `D3AMR` writer"]
pub struct W(crate::W<D3AMR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<D3AMR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<D3AMR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<D3AMR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "BDMA and DMAMUX Autonomous mode enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BDMAAMEN_A {
#[doc = "0: Clock disabled in autonomous mode"]
Disabled = 0,
#[doc = "1: Clock enabled in autonomous mode"]
Enabled = 1,
}
impl From<BDMAAMEN_A> for bool {
#[inline(always)]
fn from(variant: BDMAAMEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `BDMAAMEN` reader - BDMA and DMAMUX Autonomous mode enable"]
pub type BDMAAMEN_R = crate::BitReader<BDMAAMEN_A>;
impl BDMAAMEN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> BDMAAMEN_A {
match self.bits {
false => BDMAAMEN_A::Disabled,
true => BDMAAMEN_A::Enabled,
}
}
#[doc = "Checks if the value of the field is `Disabled`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == BDMAAMEN_A::Disabled
}
#[doc = "Checks if the value of the field is `Enabled`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == BDMAAMEN_A::Enabled
}
}
#[doc = "Field `BDMAAMEN` writer - BDMA and DMAMUX Autonomous mode enable"]
pub type BDMAAMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, D3AMR_SPEC, BDMAAMEN_A, O>;
impl<'a, const O: u8> BDMAAMEN_W<'a, O> {
#[doc = "Clock disabled in autonomous mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(BDMAAMEN_A::Disabled)
}
#[doc = "Clock enabled in autonomous mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(BDMAAMEN_A::Enabled)
}
}
#[doc = "LPUART1 Autonomous mode enable"]
pub use BDMAAMEN_A as LPUART1AMEN_A;
#[doc = "SPI6 Autonomous mode enable"]
pub use BDMAAMEN_A as SPI6AMEN_A;
#[doc = "I2C4 Autonomous mode enable"]
pub use BDMAAMEN_A as I2C4AMEN_A;
#[doc = "LPTIM2 Autonomous mode enable"]
pub use BDMAAMEN_A as LPTIM2AMEN_A;
#[doc = "LPTIM3 Autonomous mode enable"]
pub use BDMAAMEN_A as LPTIM3AMEN_A;
#[doc = "LPTIM4 Autonomous mode enable"]
pub use BDMAAMEN_A as LPTIM4AMEN_A;
#[doc = "LPTIM5 Autonomous mode enable"]
pub use BDMAAMEN_A as LPTIM5AMEN_A;
#[doc = "COMP12 Autonomous mode enable"]
pub use BDMAAMEN_A as COMP12AMEN_A;
#[doc = "VREF Autonomous mode enable"]
pub use BDMAAMEN_A as VREFAMEN_A;
#[doc = "RTC Autonomous mode enable"]
pub use BDMAAMEN_A as RTCAMEN_A;
#[doc = "CRC Autonomous mode enable"]
pub use BDMAAMEN_A as CRCAMEN_A;
#[doc = "SAI4 Autonomous mode enable"]
pub use BDMAAMEN_A as SAI4AMEN_A;
#[doc = "ADC3 Autonomous mode enable"]
pub use BDMAAMEN_A as ADC3AMEN_A;
#[doc = "Backup RAM Autonomous mode enable"]
pub use BDMAAMEN_A as BKPSRAMAMEN_A;
#[doc = "SRAM4 Autonomous mode enable"]
pub use BDMAAMEN_A as SRAM4AMEN_A;
#[doc = "Field `LPUART1AMEN` reader - LPUART1 Autonomous mode enable"]
pub use BDMAAMEN_R as LPUART1AMEN_R;
#[doc = "Field `SPI6AMEN` reader - SPI6 Autonomous mode enable"]
pub use BDMAAMEN_R as SPI6AMEN_R;
#[doc = "Field `I2C4AMEN` reader - I2C4 Autonomous mode enable"]
pub use BDMAAMEN_R as I2C4AMEN_R;
#[doc = "Field `LPTIM2AMEN` reader - LPTIM2 Autonomous mode enable"]
pub use BDMAAMEN_R as LPTIM2AMEN_R;
#[doc = "Field `LPTIM3AMEN` reader - LPTIM3 Autonomous mode enable"]
pub use BDMAAMEN_R as LPTIM3AMEN_R;
#[doc = "Field `LPTIM4AMEN` reader - LPTIM4 Autonomous mode enable"]
pub use BDMAAMEN_R as LPTIM4AMEN_R;
#[doc = "Field `LPTIM5AMEN` reader - LPTIM5 Autonomous mode enable"]
pub use BDMAAMEN_R as LPTIM5AMEN_R;
#[doc = "Field `COMP12AMEN` reader - COMP12 Autonomous mode enable"]
pub use BDMAAMEN_R as COMP12AMEN_R;
#[doc = "Field `VREFAMEN` reader - VREF Autonomous mode enable"]
pub use BDMAAMEN_R as VREFAMEN_R;
#[doc = "Field `RTCAMEN` reader - RTC Autonomous mode enable"]
pub use BDMAAMEN_R as RTCAMEN_R;
#[doc = "Field `CRCAMEN` reader - CRC Autonomous mode enable"]
pub use BDMAAMEN_R as CRCAMEN_R;
#[doc = "Field `SAI4AMEN` reader - SAI4 Autonomous mode enable"]
pub use BDMAAMEN_R as SAI4AMEN_R;
#[doc = "Field `ADC3AMEN` reader - ADC3 Autonomous mode enable"]
pub use BDMAAMEN_R as ADC3AMEN_R;
#[doc = "Field `BKPSRAMAMEN` reader - Backup RAM Autonomous mode enable"]
pub use BDMAAMEN_R as BKPSRAMAMEN_R;
#[doc = "Field `SRAM4AMEN` reader - SRAM4 Autonomous mode enable"]
pub use BDMAAMEN_R as SRAM4AMEN_R;
#[doc = "Field `LPUART1AMEN` writer - LPUART1 Autonomous mode enable"]
pub use BDMAAMEN_W as LPUART1AMEN_W;
#[doc = "Field `SPI6AMEN` writer - SPI6 Autonomous mode enable"]
pub use BDMAAMEN_W as SPI6AMEN_W;
#[doc = "Field `I2C4AMEN` writer - I2C4 Autonomous mode enable"]
pub use BDMAAMEN_W as I2C4AMEN_W;
#[doc = "Field `LPTIM2AMEN` writer - LPTIM2 Autonomous mode enable"]
pub use BDMAAMEN_W as LPTIM2AMEN_W;
#[doc = "Field `LPTIM3AMEN` writer - LPTIM3 Autonomous mode enable"]
pub use BDMAAMEN_W as LPTIM3AMEN_W;
#[doc = "Field `LPTIM4AMEN` writer - LPTIM4 Autonomous mode enable"]
pub use BDMAAMEN_W as LPTIM4AMEN_W;
#[doc = "Field `LPTIM5AMEN` writer - LPTIM5 Autonomous mode enable"]
pub use BDMAAMEN_W as LPTIM5AMEN_W;
#[doc = "Field `COMP12AMEN` writer - COMP12 Autonomous mode enable"]
pub use BDMAAMEN_W as COMP12AMEN_W;
#[doc = "Field `VREFAMEN` writer - VREF Autonomous mode enable"]
pub use BDMAAMEN_W as VREFAMEN_W;
#[doc = "Field `RTCAMEN` writer - RTC Autonomous mode enable"]
pub use BDMAAMEN_W as RTCAMEN_W;
#[doc = "Field `CRCAMEN` writer - CRC Autonomous mode enable"]
pub use BDMAAMEN_W as CRCAMEN_W;
#[doc = "Field `SAI4AMEN` writer - SAI4 Autonomous mode enable"]
pub use BDMAAMEN_W as SAI4AMEN_W;
#[doc = "Field `ADC3AMEN` writer - ADC3 Autonomous mode enable"]
pub use BDMAAMEN_W as ADC3AMEN_W;
#[doc = "Field `BKPSRAMAMEN` writer - Backup RAM Autonomous mode enable"]
pub use BDMAAMEN_W as BKPSRAMAMEN_W;
#[doc = "Field `SRAM4AMEN` writer - SRAM4 Autonomous mode enable"]
pub use BDMAAMEN_W as SRAM4AMEN_W;
impl R {
#[doc = "Bit 0 - BDMA and DMAMUX Autonomous mode enable"]
#[inline(always)]
pub fn bdmaamen(&self) -> BDMAAMEN_R {
BDMAAMEN_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 3 - LPUART1 Autonomous mode enable"]
#[inline(always)]
pub fn lpuart1amen(&self) -> LPUART1AMEN_R {
LPUART1AMEN_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 5 - SPI6 Autonomous mode enable"]
#[inline(always)]
pub fn spi6amen(&self) -> SPI6AMEN_R {
SPI6AMEN_R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 7 - I2C4 Autonomous mode enable"]
#[inline(always)]
pub fn i2c4amen(&self) -> I2C4AMEN_R {
I2C4AMEN_R::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 9 - LPTIM2 Autonomous mode enable"]
#[inline(always)]
pub fn lptim2amen(&self) -> LPTIM2AMEN_R {
LPTIM2AMEN_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - LPTIM3 Autonomous mode enable"]
#[inline(always)]
pub fn lptim3amen(&self) -> LPTIM3AMEN_R {
LPTIM3AMEN_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - LPTIM4 Autonomous mode enable"]
#[inline(always)]
pub fn lptim4amen(&self) -> LPTIM4AMEN_R {
LPTIM4AMEN_R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - LPTIM5 Autonomous mode enable"]
#[inline(always)]
pub fn lptim5amen(&self) -> LPTIM5AMEN_R {
LPTIM5AMEN_R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 14 - COMP12 Autonomous mode enable"]
#[inline(always)]
pub fn comp12amen(&self) -> COMP12AMEN_R {
COMP12AMEN_R::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - VREF Autonomous mode enable"]
#[inline(always)]
pub fn vrefamen(&self) -> VREFAMEN_R {
VREFAMEN_R::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bit 16 - RTC Autonomous mode enable"]
#[inline(always)]
pub fn rtcamen(&self) -> RTCAMEN_R {
RTCAMEN_R::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 19 - CRC Autonomous mode enable"]
#[inline(always)]
pub fn crcamen(&self) -> CRCAMEN_R {
CRCAMEN_R::new(((self.bits >> 19) & 1) != 0)
}
#[doc = "Bit 21 - SAI4 Autonomous mode enable"]
#[inline(always)]
pub fn sai4amen(&self) -> SAI4AMEN_R {
SAI4AMEN_R::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 24 - ADC3 Autonomous mode enable"]
#[inline(always)]
pub fn adc3amen(&self) -> ADC3AMEN_R {
ADC3AMEN_R::new(((self.bits >> 24) & 1) != 0)
}
#[doc = "Bit 28 - Backup RAM Autonomous mode enable"]
#[inline(always)]
pub fn bkpsramamen(&self) -> BKPSRAMAMEN_R {
BKPSRAMAMEN_R::new(((self.bits >> 28) & 1) != 0)
}
#[doc = "Bit 29 - SRAM4 Autonomous mode enable"]
#[inline(always)]
pub fn sram4amen(&self) -> SRAM4AMEN_R {
SRAM4AMEN_R::new(((self.bits >> 29) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - BDMA and DMAMUX Autonomous mode enable"]
#[inline(always)]
pub fn bdmaamen(&mut self) -> BDMAAMEN_W<0> {
BDMAAMEN_W::new(self)
}
#[doc = "Bit 3 - LPUART1 Autonomous mode enable"]
#[inline(always)]
pub fn lpuart1amen(&mut self) -> LPUART1AMEN_W<3> {
LPUART1AMEN_W::new(self)
}
#[doc = "Bit 5 - SPI6 Autonomous mode enable"]
#[inline(always)]
pub fn spi6amen(&mut self) -> SPI6AMEN_W<5> {
SPI6AMEN_W::new(self)
}
#[doc = "Bit 7 - I2C4 Autonomous mode enable"]
#[inline(always)]
pub fn i2c4amen(&mut self) -> I2C4AMEN_W<7> {
I2C4AMEN_W::new(self)
}
#[doc = "Bit 9 - LPTIM2 Autonomous mode enable"]
#[inline(always)]
pub fn lptim2amen(&mut self) -> LPTIM2AMEN_W<9> {
LPTIM2AMEN_W::new(self)
}
#[doc = "Bit 10 - LPTIM3 Autonomous mode enable"]
#[inline(always)]
pub fn lptim3amen(&mut self) -> LPTIM3AMEN_W<10> {
LPTIM3AMEN_W::new(self)
}
#[doc = "Bit 11 - LPTIM4 Autonomous mode enable"]
#[inline(always)]
pub fn lptim4amen(&mut self) -> LPTIM4AMEN_W<11> {
LPTIM4AMEN_W::new(self)
}
#[doc = "Bit 12 - LPTIM5 Autonomous mode enable"]
#[inline(always)]
pub fn lptim5amen(&mut self) -> LPTIM5AMEN_W<12> {
LPTIM5AMEN_W::new(self)
}
#[doc = "Bit 14 - COMP12 Autonomous mode enable"]
#[inline(always)]
pub fn comp12amen(&mut self) -> COMP12AMEN_W<14> {
COMP12AMEN_W::new(self)
}
#[doc = "Bit 15 - VREF Autonomous mode enable"]
#[inline(always)]
pub fn vrefamen(&mut self) -> VREFAMEN_W<15> {
VREFAMEN_W::new(self)
}
#[doc = "Bit 16 - RTC Autonomous mode enable"]
#[inline(always)]
pub fn rtcamen(&mut self) -> RTCAMEN_W<16> {
RTCAMEN_W::new(self)
}
#[doc = "Bit 19 - CRC Autonomous mode enable"]
#[inline(always)]
pub fn crcamen(&mut self) -> CRCAMEN_W<19> {
CRCAMEN_W::new(self)
}
#[doc = "Bit 21 - SAI4 Autonomous mode enable"]
#[inline(always)]
pub fn sai4amen(&mut self) -> SAI4AMEN_W<21> {
SAI4AMEN_W::new(self)
}
#[doc = "Bit 24 - ADC3 Autonomous mode enable"]
#[inline(always)]
pub fn adc3amen(&mut self) -> ADC3AMEN_W<24> {
ADC3AMEN_W::new(self)
}
#[doc = "Bit 28 - Backup RAM Autonomous mode enable"]
#[inline(always)]
pub fn bkpsramamen(&mut self) -> BKPSRAMAMEN_W<28> {
BKPSRAMAMEN_W::new(self)
}
#[doc = "Bit 29 - SRAM4 Autonomous mode enable"]
#[inline(always)]
pub fn sram4amen(&mut self) -> SRAM4AMEN_W<29> {
SRAM4AMEN_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "RCC D3 Autonomous mode Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [d3amr](index.html) module"]
pub struct D3AMR_SPEC;
impl crate::RegisterSpec for D3AMR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [d3amr::R](R) reader structure"]
impl crate::Readable for D3AMR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [d3amr::W](W) writer structure"]
impl crate::Writable for D3AMR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets D3AMR to value 0"]
impl crate::Resettable for D3AMR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
