Module stm32h7::stm32h743v::rtc

RTC

Modules

alrmar	This register can be written only when ALRAWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
alrmassr	This register can be written only when ALRAE is reset in RTC_CR register, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9
alrmbr	This register can be written only when ALRBWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
alrmbssr	This register can be written only when ALRBE is reset in RTC_CR register, or in initialization mode.This register is write protected.The write access procedure is described in Section: RTC register write protection.
bkp0r	RTC backup registers
bkp1r	RTC backup registers
bkp2r	RTC backup registers
bkp3r	RTC backup registers
bkp4r	RTC backup registers
bkp5r	RTC backup registers
bkp6r	RTC backup registers
bkp7r	RTC backup registers
bkp8r	RTC backup registers
bkp9r	RTC backup registers
bkp10r	RTC backup registers
bkp11r	RTC backup registers
bkp12r	RTC backup registers
bkp13r	RTC backup registers
bkp14r	RTC backup registers
bkp15r	RTC backup registers
bkp16r	RTC backup registers
bkp17r	RTC backup registers
bkp18r	RTC backup registers
bkp19r	RTC backup registers
bkp20r	RTC backup registers
bkp21r	RTC backup registers
bkp22r	RTC backup registers
bkp23r	RTC backup registers
bkp24r	RTC backup registers
bkp25r	RTC backup registers
bkp26r	RTC backup registers
bkp27r	RTC backup registers
bkp28r	RTC backup registers
bkp29r	RTC backup registers
bkp30r	RTC backup registers
bkp31r	RTC backup registers
calr	This register is write protected. The write access procedure is described in RTC register write protection on page9.
cr	RTC control register
dr	The RTC_DR is the calendar date shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page9 and Reading the calendar on page10.This register is write protected. The write access procedure is described in RTC register write protection on page9.
isr	This register is write protected (except for RTC_ISR[13:8] bits). The write access procedure is described in RTC register write protection on page9.
or	RTC option register
prer	This register must be written in initialization mode only. The initialization must be performed in two separate write accesses. Refer to Calendar initialization and configuration on page9.This register is write protected. The write access procedure is described in RTC register write protection on page9.
shiftr	This register is write protected. The write access procedure is described in RTC register write protection on page9.
ssr	RTC sub second register
tampcr	RTC tamper and alternate function configuration register
tr	The RTC_TR is the calendar time shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page9 and Reading the calendar on page10.This register is write protected. The write access procedure is described in RTC register write protection on page9.
tsdr	The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when TSF bit is reset.
tsssr	The content of this register is valid only when RTC_ISR/TSF is set. It is cleared when the RTC_ISR/TSF bit is reset.
tstr	The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when TSF bit is reset.
wpr	RTC write protection register
wutr	This register can be written only when WUTWF is set to 1 in RTC_ISR.This register is write protected. The write access procedure is described in RTC register write protection on page9.

Structs

ALRMAR	This register can be written only when ALRAWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
ALRMASSR	This register can be written only when ALRAE is reset in RTC_CR register, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9
ALRMBR	This register can be written only when ALRBWF is set to 1 in RTC_ISR, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9.
ALRMBSSR	This register can be written only when ALRBE is reset in RTC_CR register, or in initialization mode.This register is write protected.The write access procedure is described in Section: RTC register write protection.
BKP0R	RTC backup registers
BKP1R	RTC backup registers
BKP2R	RTC backup registers
BKP3R	RTC backup registers
BKP4R	RTC backup registers
BKP5R	RTC backup registers
BKP6R	RTC backup registers
BKP7R	RTC backup registers
BKP8R	RTC backup registers
BKP9R	RTC backup registers
BKP10R	RTC backup registers
BKP11R	RTC backup registers
BKP12R	RTC backup registers
BKP13R	RTC backup registers
BKP14R	RTC backup registers
BKP15R	RTC backup registers
BKP16R	RTC backup registers
BKP17R	RTC backup registers
BKP18R	RTC backup registers
BKP19R	RTC backup registers
BKP20R	RTC backup registers
BKP21R	RTC backup registers
BKP22R	RTC backup registers
BKP23R	RTC backup registers
BKP24R	RTC backup registers
BKP25R	RTC backup registers
BKP26R	RTC backup registers
BKP27R	RTC backup registers
BKP28R	RTC backup registers
BKP29R	RTC backup registers
BKP30R	RTC backup registers
BKP31R	RTC backup registers
CALR	This register is write protected. The write access procedure is described in RTC register write protection on page9.
CR	RTC control register
DR	The RTC_DR is the calendar date shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page9 and Reading the calendar on page10.This register is write protected. The write access procedure is described in RTC register write protection on page9.
ISR	This register is write protected (except for RTC_ISR[13:8] bits). The write access procedure is described in RTC register write protection on page9.
OR	RTC option register
PRER	This register must be written in initialization mode only. The initialization must be performed in two separate write accesses. Refer to Calendar initialization and configuration on page9.This register is write protected. The write access procedure is described in RTC register write protection on page9.
RegisterBlock	Register block
SHIFTR	This register is write protected. The write access procedure is described in RTC register write protection on page9.
SSR	RTC sub second register
TAMPCR	RTC tamper and alternate function configuration register
TR	The RTC_TR is the calendar time shadow register. This register must be written in initialization mode only. Refer to Calendar initialization and configuration on page9 and Reading the calendar on page10.This register is write protected. The write access procedure is described in RTC register write protection on page9.
TSDR	The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when TSF bit is reset.
TSSSR	The content of this register is valid only when RTC_ISR/TSF is set. It is cleared when the RTC_ISR/TSF bit is reset.
TSTR	The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when TSF bit is reset.
WPR	RTC write protection register
WUTR	This register can be written only when WUTWF is set to 1 in RTC_ISR.This register is write protected. The write access procedure is described in RTC register write protection on page9.