[−][src]Module stm32h7::stm32h743::ethernet_mac
Ethernet: media access control (MAC)
Modules
| mac1ustcr | 1-microsecond-tick counter register |
| maca0hr | Address 0 high register |
| maca0lr | Address 0 low register |
| maca1lr | Address 1 low register |
| maca1hr | Address 1 high register |
| maca2lr | Address 2 low register |
| maca2hr | Address 2 high register |
| maca3hr | Address 3 high register |
| maca3lr | Address 3 low register |
| macacr | Auxiliary control register |
| macarpar | ARP address register |
| macatsnr | Auxiliary timestamp nanoseconds register |
| macatssr | Auxiliary timestamp seconds register |
| maccr | Operating mode configuration register |
| macdr | Debug register |
| macecr | Extended operating mode configuration register |
| macht0r | Hash Table 0 register |
| macht1r | Hash Table 1 register |
| machwf1r | HW feature 1 register |
| machwf2r | HW feature 2 register |
| macier | Interrupt enable register |
| macisr | Interrupt status register |
| macivir | Inner VLAN inclusion register |
| macl3a00r | MACL3A00R |
| macl3a01r | Layer3 address 0 filter 1 Register |
| macl3a10r | Layer3 address 1 filter 0 register |
| macl3a11r | Layer3 address 1 filter 1 register |
| macl3a20 | Layer3 Address 2 filter 0 register |
| macl3a21r | Layer3 address 2 filter 1 Register |
| macl3a30 | Layer3 Address 3 filter 0 register |
| macl3a31r | Layer3 address 3 filter 1 register |
| macl3l4c0r | L3 and L4 control 0 register |
| macl3l4c1r | L3 and L4 control 1 register |
| macl4a0r | Layer4 address filter 0 register |
| macl4a1r | Layer 4 address filter 1 register |
| maclcsr | LPI control status register |
| macletr | LPI entry timer register |
| maclmir | Log message interval register |
| macltcr | LPI timers control register |
| macmdioar | MDIO address register |
| macmdiodr | MDIO data register |
| macpcsr | PMT control status register |
| macpfr | Packet filtering control register |
| macpocr | PTP Offload control register |
| macppscr | PPS control register |
| macppsir | PPS interval register |
| macppsttnr | PPS target time nanoseconds register |
| macppsttsr | PPS target time seconds register |
| macppswr | PPS width register |
| macqtx_fcr | Tx Queue flow control register |
| macrwkpfr | Remove wakeup packet filter register |
| macrx_fcr | Rx flow control register |
| macrx_tx_sr | Rx Tx status register |
| macspi0r | PTP Source Port Identity 0 Register |
| macspi1r | PTP Source port identity 1 register |
| macspi2r | PTP Source port identity 2 register |
| macssir | Sub-second increment register |
| macstnr | System time nanoseconds register |
| macstnur | System time nanoseconds update register |
| macstsr | System time seconds register |
| macstsur | System time seconds update register |
| mactsar | Timestamp addend register |
| mactscr | Timestamp control Register |
| mactseacr | Timestamp Egress asymmetric correction register |
| mactsecnr | Timestamp Egress correction nanosecond register |
| mactsiacr | Timestamp Ingress asymmetric correction register |
| mactsicnr | Timestamp Ingress correction nanosecond register |
| mactssr | Timestamp status register |
| mactx_tssnr | Tx timestamp status nanoseconds register |
| mactx_tsssr | Tx timestamp status seconds register |
| macvhtr | VLAN Hash table register |
| macvir | VLAN inclusion register |
| macvr | Version register |
| macvtr | VLAN tag register |
| macwtr | Watchdog timeout register |
| mmc_control | MMC control register |
| mmc_rx_interrupt | MMC Rx interrupt register |
| mmc_rx_interrupt_mask | MMC Rx interrupt mask register |
| mmc_tx_interrupt | MMC Tx interrupt register |
| mmc_tx_interrupt_mask | MMC Tx interrupt mask register |
| rx_alignment_error_packets | Rx alignment error packets register |
| rx_crc_error_packets | Rx CRC error packets register |
| rx_lpi_tran_cntr | Rx LPI transition counter register |
| rx_lpi_usec_cntr | Rx LPI microsecond counter register |
| rx_unicast_packets_good | Rx unicast packets good register |
| tx_lpi_tran_cntr | Tx LPI transition counter register |
| tx_lpi_usec_cntr | Tx LPI microsecond timer register |
| tx_multiple_collision_good_packets | Tx multiple collision good packets register |
| tx_packet_count_good | Tx packet count good register |
| tx_single_collision_good_packets | Tx single collision good packets register |
Structs
| MAC1USTCR | 1-microsecond-tick counter register |
| MACA0HR | Address 0 high register |
| MACA0LR | Address 0 low register |
| MACA1LR | Address 1 low register |
| MACA1HR | Address 1 high register |
| MACA2LR | Address 2 low register |
| MACA2HR | Address 2 high register |
| MACA3HR | Address 3 high register |
| MACA3LR | Address 3 low register |
| MACACR | Auxiliary control register |
| MACARPAR | ARP address register |
| MACATSNR | Auxiliary timestamp nanoseconds register |
| MACATSSR | Auxiliary timestamp seconds register |
| MACCR | Operating mode configuration register |
| MACDR | Debug register |
| MACECR | Extended operating mode configuration register |
| MACHT0R | Hash Table 0 register |
| MACHT1R | Hash Table 1 register |
| MACHWF1R | HW feature 1 register |
| MACHWF2R | HW feature 2 register |
| MACIER | Interrupt enable register |
| MACISR | Interrupt status register |
| MACIVIR | Inner VLAN inclusion register |
| MACL3A00R | MACL3A00R |
| MACL3A01R | Layer3 address 0 filter 1 Register |
| MACL3A10R | Layer3 address 1 filter 0 register |
| MACL3A11R | Layer3 address 1 filter 1 register |
| MACL3A20 | Layer3 Address 2 filter 0 register |
| MACL3A21R | Layer3 address 2 filter 1 Register |
| MACL3A30 | Layer3 Address 3 filter 0 register |
| MACL3A31R | Layer3 address 3 filter 1 register |
| MACL3L4C0R | L3 and L4 control 0 register |
| MACL3L4C1R | L3 and L4 control 1 register |
| MACL4A0R | Layer4 address filter 0 register |
| MACL4A1R | Layer 4 address filter 1 register |
| MACLCSR | LPI control status register |
| MACLETR | LPI entry timer register |
| MACLMIR | Log message interval register |
| MACLTCR | LPI timers control register |
| MACMDIOAR | MDIO address register |
| MACMDIODR | MDIO data register |
| MACPCSR | PMT control status register |
| MACPFR | Packet filtering control register |
| MACPOCR | PTP Offload control register |
| MACPPSCR | PPS control register |
| MACPPSIR | PPS interval register |
| MACPPSTTNR | PPS target time nanoseconds register |
| MACPPSTTSR | PPS target time seconds register |
| MACPPSWR | PPS width register |
| MACQTXFCR | Tx Queue flow control register |
| MACRWKPFR | Remove wakeup packet filter register |
| MACRXFCR | Rx flow control register |
| MACRXTXSR | Rx Tx status register |
| MACSPI0R | PTP Source Port Identity 0 Register |
| MACSPI1R | PTP Source port identity 1 register |
| MACSPI2R | PTP Source port identity 2 register |
| MACSSIR | Sub-second increment register |
| MACSTNR | System time nanoseconds register |
| MACSTNUR | System time nanoseconds update register |
| MACSTSR | System time seconds register |
| MACSTSUR | System time seconds update register |
| MACTSAR | Timestamp addend register |
| MACTSCR | Timestamp control Register |
| MACTSEACR | Timestamp Egress asymmetric correction register |
| MACTSECNR | Timestamp Egress correction nanosecond register |
| MACTSIACR | Timestamp Ingress asymmetric correction register |
| MACTSICNR | Timestamp Ingress correction nanosecond register |
| MACTSSR | Timestamp status register |
| MACTXTSSNR | Tx timestamp status nanoseconds register |
| MACTXTSSSR | Tx timestamp status seconds register |
| MACVHTR | VLAN Hash table register |
| MACVIR | VLAN inclusion register |
| MACVR | Version register |
| MACVTR | VLAN tag register |
| MACWTR | Watchdog timeout register |
| MMC_CONTROL | MMC control register |
| MMC_RX_INTERRUPT | MMC Rx interrupt register |
| MMC_RX_INTERRUPT_MASK | MMC Rx interrupt mask register |
| MMC_TX_INTERRUPT | MMC Tx interrupt register |
| MMC_TX_INTERRUPT_MASK | MMC Tx interrupt mask register |
| RX_ALIGNMENT_ERROR_PACKETS | Rx alignment error packets register |
| RX_CRC_ERROR_PACKETS | Rx CRC error packets register |
| RX_LPI_TRAN_CNTR | Rx LPI transition counter register |
| RX_LPI_USEC_CNTR | Rx LPI microsecond counter register |
| RX_UNICAST_PACKETS_GOOD | Rx unicast packets good register |
| RegisterBlock | Register block |
| TX_LPI_TRAN_CNTR | Tx LPI transition counter register |
| TX_LPI_USEC_CNTR | Tx LPI microsecond timer register |
| TX_MULTIPLE_COLLISION_GOOD_PACKETS | Tx multiple collision good packets register |
| TX_PACKET_COUNT_GOOD | Tx packet count good register |
| TX_SINGLE_COLLISION_GOOD_PACKETS | Tx single collision good packets register |