[−][src]Module stm32h7::stm32h743v::i2c1::oar1
Access: No wait states, except if a write access occurs while a write access to this register is ongoing. In this case, wait states are inserted in the second write access until the previous one is completed. The latency of the second write access can be up to 2 x PCLK1 + 6 x I2CCLK.
Structs
| OA1R | Value of the field |
| R | Value read from the register |
| W | Value to write to the register |
| _OA1W | Proxy |
| _OA1MODEW | Proxy |
| _OA1ENW | Proxy |
Enums
| OA1MODER | Possible values of the field |
| OA1MODEW | Values that can be written to the field |
| OA1ENR | Possible values of the field |
| OA1ENW | Values that can be written to the field |