#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - FDCAN Core Release Register"]
pub crel: CREL,
#[doc = "0x04 - FDCAN Core Release Register"]
pub endn: ENDN,
_reserved2: [u8; 4usize],
#[doc = "0x0c - FDCAN Data Bit Timing and Prescaler Register"]
pub dbtp: DBTP,
#[doc = "0x10 - FDCAN Test Register"]
pub test: TEST,
#[doc = "0x14 - FDCAN RAM Watchdog Register"]
pub rwd: RWD,
#[doc = "0x18 - FDCAN CC Control Register"]
pub cccr: CCCR,
#[doc = "0x1c - FDCAN Nominal Bit Timing and Prescaler Register"]
pub nbtp: NBTP,
#[doc = "0x20 - FDCAN Timestamp Counter Configuration Register"]
pub tscc: TSCC,
#[doc = "0x24 - FDCAN Timestamp Counter Value Register"]
pub tscv: TSCV,
#[doc = "0x28 - FDCAN Timeout Counter Configuration Register"]
pub tocc: TOCC,
#[doc = "0x2c - FDCAN Timeout Counter Value Register"]
pub tocv: TOCV,
_reserved11: [u8; 16usize],
#[doc = "0x40 - FDCAN Error Counter Register"]
pub ecr: ECR,
#[doc = "0x44 - FDCAN Protocol Status Register"]
pub psr: PSR,
#[doc = "0x48 - FDCAN Transmitter Delay Compensation Register"]
pub tdcr: TDCR,
_reserved14: [u8; 4usize],
#[doc = "0x50 - FDCAN Interrupt Register"]
pub ir: IR,
#[doc = "0x54 - FDCAN Interrupt Enable Register"]
pub ie: IE,
#[doc = "0x58 - FDCAN Interrupt Line Select Register"]
pub ils: ILS,
#[doc = "0x5c - FDCAN Interrupt Line Enable Register"]
pub ile: ILE,
_reserved18: [u8; 32usize],
#[doc = "0x80 - FDCAN Global Filter Configuration Register"]
pub gfc: GFC,
#[doc = "0x84 - FDCAN Standard ID Filter Configuration Register"]
pub sidfc: SIDFC,
#[doc = "0x88 - FDCAN Extended ID Filter Configuration Register"]
pub xidfc: XIDFC,
_reserved21: [u8; 4usize],
#[doc = "0x90 - FDCAN Extended ID and Mask Register"]
pub xidam: XIDAM,
#[doc = "0x94 - FDCAN High Priority Message Status Register"]
pub hpms: HPMS,
#[doc = "0x98 - FDCAN New Data 1 Register"]
pub ndat1: NDAT1,
#[doc = "0x9c - FDCAN New Data 2 Register"]
pub ndat2: NDAT2,
#[doc = "0xa0 - FDCAN Rx FIFO 0 Configuration Register"]
pub rxf0c: RXF0C,
#[doc = "0xa4 - FDCAN Rx FIFO 0 Status Register"]
pub rxf0s: RXF0S,
#[doc = "0xa8 - CAN Rx FIFO 0 Acknowledge Register"]
pub rxf0a: RXF0A,
#[doc = "0xac - FDCAN Rx Buffer Configuration Register"]
pub rxbc: RXBC,
#[doc = "0xb0 - FDCAN Rx FIFO 1 Configuration Register"]
pub rxf1c: RXF1C,
#[doc = "0xb4 - FDCAN Rx FIFO 1 Status Register"]
pub rxf1s: RXF1S,
#[doc = "0xb8 - FDCAN Rx FIFO 1 Acknowledge Register"]
pub rxf1a: RXF1A,
#[doc = "0xbc - FDCAN Rx Buffer Element Size Configuration Register"]
pub rxesc: RXESC,
#[doc = "0xc0 - FDCAN Tx Buffer Configuration Register"]
pub txbc: TXBC,
#[doc = "0xc4 - FDCAN Tx FIFO/Queue Status Register"]
pub txfqs: TXFQS,
#[doc = "0xc8 - FDCAN Tx Buffer Element Size Configuration Register"]
pub txesc: TXESC,
#[doc = "0xcc - FDCAN Tx Buffer Request Pending Register"]
pub txbrp: TXBRP,
#[doc = "0xd0 - FDCAN Tx Buffer Add Request Register"]
pub txbar: TXBAR,
#[doc = "0xd4 - FDCAN Tx Buffer Cancellation Request Register"]
pub txbcr: TXBCR,
#[doc = "0xd8 - FDCAN Tx Buffer Transmission Occurred Register"]
pub txbto: TXBTO,
#[doc = "0xdc - FDCAN Tx Buffer Cancellation Finished Register"]
pub txbcf: TXBCF,
#[doc = "0xe0 - FDCAN Tx Buffer Transmission Interrupt Enable Register"]
pub txbtie: TXBTIE,
#[doc = "0xe4 - FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register"]
pub txbcie: TXBCIE,
_reserved43: [u8; 8usize],
#[doc = "0xf0 - FDCAN Tx Event FIFO Configuration Register"]
pub txefc: TXEFC,
#[doc = "0xf4 - FDCAN Tx Event FIFO Status Register"]
pub txefs: TXEFS,
#[doc = "0xf8 - FDCAN Tx Event FIFO Acknowledge Register"]
pub txefa: TXEFA,
_reserved46: [u8; 4usize],
#[doc = "0x100 - FDCAN TT Trigger Memory Configuration Register"]
pub tttmc: TTTMC,
#[doc = "0x104 - FDCAN TT Reference Message Configuration Register"]
pub ttrmc: TTRMC,
#[doc = "0x108 - FDCAN TT Operation Configuration Register"]
pub ttocf: TTOCF,
#[doc = "0x10c - FDCAN TT Matrix Limits Register"]
pub ttmlm: TTMLM,
#[doc = "0x110 - FDCAN TUR Configuration Register"]
pub turcf: TURCF,
#[doc = "0x114 - FDCAN TT Operation Control Register"]
pub ttocn: TTOCN,
#[doc = "0x118 - FDCAN TT Global Time Preset Register"]
pub can_ttgtp: CAN_TTGTP,
#[doc = "0x11c - FDCAN TT Time Mark Register"]
pub tttmk: TTTMK,
#[doc = "0x120 - FDCAN TT Interrupt Register"]
pub ttir: TTIR,
#[doc = "0x124 - FDCAN TT Interrupt Enable Register"]
pub ttie: TTIE,
#[doc = "0x128 - FDCAN TT Interrupt Line Select Register"]
pub ttils: TTILS,
#[doc = "0x12c - FDCAN TT Operation Status Register"]
pub ttost: TTOST,
#[doc = "0x130 - FDCAN TUR Numerator Actual Register"]
pub turna: TURNA,
#[doc = "0x134 - FDCAN TT Local and Global Time Register"]
pub ttlgt: TTLGT,
#[doc = "0x138 - FDCAN TT Cycle Time and Count Register"]
pub ttctc: TTCTC,
#[doc = "0x13c - FDCAN TT Capture Time Register"]
pub ttcpt: TTCPT,
#[doc = "0x140 - FDCAN TT Cycle Sync Mark Register"]
pub ttcsm: TTCSM,
_reserved63: [u8; 444usize],
#[doc = "0x300 - FDCAN TT Trigger Select Register"]
pub ttts: TTTS,
}
#[doc = "FDCAN Core Release Register"]
pub struct CREL {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Core Release Register"]
pub mod crel;
#[doc = "FDCAN Core Release Register"]
pub struct ENDN {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Core Release Register"]
pub mod endn;
#[doc = "FDCAN Data Bit Timing and Prescaler Register"]
pub struct DBTP {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Data Bit Timing and Prescaler Register"]
pub mod dbtp;
#[doc = "FDCAN Test Register"]
pub struct TEST {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Test Register"]
pub mod test;
#[doc = "FDCAN RAM Watchdog Register"]
pub struct RWD {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN RAM Watchdog Register"]
pub mod rwd;
#[doc = "FDCAN CC Control Register"]
pub struct CCCR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN CC Control Register"]
pub mod cccr;
#[doc = "FDCAN Nominal Bit Timing and Prescaler Register"]
pub struct NBTP {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Nominal Bit Timing and Prescaler Register"]
pub mod nbtp;
#[doc = "FDCAN Timestamp Counter Configuration Register"]
pub struct TSCC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timestamp Counter Configuration Register"]
pub mod tscc;
#[doc = "FDCAN Timestamp Counter Value Register"]
pub struct TSCV {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timestamp Counter Value Register"]
pub mod tscv;
#[doc = "FDCAN Timeout Counter Configuration Register"]
pub struct TOCC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timeout Counter Configuration Register"]
pub mod tocc;
#[doc = "FDCAN Timeout Counter Value Register"]
pub struct TOCV {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Timeout Counter Value Register"]
pub mod tocv;
#[doc = "FDCAN Error Counter Register"]
pub struct ECR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Error Counter Register"]
pub mod ecr;
#[doc = "FDCAN Protocol Status Register"]
pub struct PSR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Protocol Status Register"]
pub mod psr;
#[doc = "FDCAN Transmitter Delay Compensation Register"]
pub struct TDCR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Transmitter Delay Compensation Register"]
pub mod tdcr;
#[doc = "FDCAN Interrupt Register"]
pub struct IR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Register"]
pub mod ir;
#[doc = "FDCAN Interrupt Enable Register"]
pub struct IE {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Enable Register"]
pub mod ie;
#[doc = "FDCAN Interrupt Line Select Register"]
pub struct ILS {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Line Select Register"]
pub mod ils;
#[doc = "FDCAN Interrupt Line Enable Register"]
pub struct ILE {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Interrupt Line Enable Register"]
pub mod ile;
#[doc = "FDCAN Global Filter Configuration Register"]
pub struct GFC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Global Filter Configuration Register"]
pub mod gfc;
#[doc = "FDCAN Standard ID Filter Configuration Register"]
pub struct SIDFC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Standard ID Filter Configuration Register"]
pub mod sidfc;
#[doc = "FDCAN Extended ID Filter Configuration Register"]
pub struct XIDFC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Extended ID Filter Configuration Register"]
pub mod xidfc;
#[doc = "FDCAN Extended ID and Mask Register"]
pub struct XIDAM {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Extended ID and Mask Register"]
pub mod xidam;
#[doc = "FDCAN High Priority Message Status Register"]
pub struct HPMS {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN High Priority Message Status Register"]
pub mod hpms;
#[doc = "FDCAN New Data 1 Register"]
pub struct NDAT1 {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN New Data 1 Register"]
pub mod ndat1;
#[doc = "FDCAN New Data 2 Register"]
pub struct NDAT2 {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN New Data 2 Register"]
pub mod ndat2;
#[doc = "FDCAN Rx FIFO 0 Configuration Register"]
pub struct RXF0C {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 0 Configuration Register"]
pub mod rxf0c;
#[doc = "FDCAN Rx FIFO 0 Status Register"]
pub struct RXF0S {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 0 Status Register"]
pub mod rxf0s;
#[doc = "CAN Rx FIFO 0 Acknowledge Register"]
pub struct RXF0A {
register: vcell::VolatileCell<u32>,
}
#[doc = "CAN Rx FIFO 0 Acknowledge Register"]
pub mod rxf0a;
#[doc = "FDCAN Rx Buffer Configuration Register"]
pub struct RXBC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx Buffer Configuration Register"]
pub mod rxbc;
#[doc = "FDCAN Rx FIFO 1 Configuration Register"]
pub struct RXF1C {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 1 Configuration Register"]
pub mod rxf1c;
#[doc = "FDCAN Rx FIFO 1 Status Register"]
pub struct RXF1S {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 1 Status Register"]
pub mod rxf1s;
#[doc = "FDCAN Rx FIFO 1 Acknowledge Register"]
pub struct RXF1A {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx FIFO 1 Acknowledge Register"]
pub mod rxf1a;
#[doc = "FDCAN Rx Buffer Element Size Configuration Register"]
pub struct RXESC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Rx Buffer Element Size Configuration Register"]
pub mod rxesc;
#[doc = "FDCAN Tx Buffer Configuration Register"]
pub struct TXBC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Configuration Register"]
pub mod txbc;
#[doc = "FDCAN Tx FIFO/Queue Status Register"]
pub struct TXFQS {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx FIFO/Queue Status Register"]
pub mod txfqs;
#[doc = "FDCAN Tx Buffer Element Size Configuration Register"]
pub struct TXESC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Element Size Configuration Register"]
pub mod txesc;
#[doc = "FDCAN Tx Buffer Request Pending Register"]
pub struct TXBRP {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Request Pending Register"]
pub mod txbrp;
#[doc = "FDCAN Tx Buffer Add Request Register"]
pub struct TXBAR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Add Request Register"]
pub mod txbar;
#[doc = "FDCAN Tx Buffer Cancellation Request Register"]
pub struct TXBCR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Cancellation Request Register"]
pub mod txbcr;
#[doc = "FDCAN Tx Buffer Transmission Occurred Register"]
pub struct TXBTO {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Transmission Occurred Register"]
pub mod txbto;
#[doc = "FDCAN Tx Buffer Cancellation Finished Register"]
pub struct TXBCF {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Cancellation Finished Register"]
pub mod txbcf;
#[doc = "FDCAN Tx Buffer Transmission Interrupt Enable Register"]
pub struct TXBTIE {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Transmission Interrupt Enable Register"]
pub mod txbtie;
#[doc = "FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register"]
pub struct TXBCIE {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register"]
pub mod txbcie;
#[doc = "FDCAN Tx Event FIFO Configuration Register"]
pub struct TXEFC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Event FIFO Configuration Register"]
pub mod txefc;
#[doc = "FDCAN Tx Event FIFO Status Register"]
pub struct TXEFS {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Event FIFO Status Register"]
pub mod txefs;
#[doc = "FDCAN Tx Event FIFO Acknowledge Register"]
pub struct TXEFA {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN Tx Event FIFO Acknowledge Register"]
pub mod txefa;
#[doc = "FDCAN TT Trigger Memory Configuration Register"]
pub struct TTTMC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Trigger Memory Configuration Register"]
pub mod tttmc;
#[doc = "FDCAN TT Reference Message Configuration Register"]
pub struct TTRMC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Reference Message Configuration Register"]
pub mod ttrmc;
#[doc = "FDCAN TT Operation Configuration Register"]
pub struct TTOCF {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Operation Configuration Register"]
pub mod ttocf;
#[doc = "FDCAN TT Matrix Limits Register"]
pub struct TTMLM {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Matrix Limits Register"]
pub mod ttmlm;
#[doc = "FDCAN TUR Configuration Register"]
pub struct TURCF {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TUR Configuration Register"]
pub mod turcf;
#[doc = "FDCAN TT Operation Control Register"]
pub struct TTOCN {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Operation Control Register"]
pub mod ttocn;
#[doc = "FDCAN TT Global Time Preset Register"]
pub struct CAN_TTGTP {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Global Time Preset Register"]
pub mod can_ttgtp;
#[doc = "FDCAN TT Time Mark Register"]
pub struct TTTMK {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Time Mark Register"]
pub mod tttmk;
#[doc = "FDCAN TT Interrupt Register"]
pub struct TTIR {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Interrupt Register"]
pub mod ttir;
#[doc = "FDCAN TT Interrupt Enable Register"]
pub struct TTIE {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Interrupt Enable Register"]
pub mod ttie;
#[doc = "FDCAN TT Interrupt Line Select Register"]
pub struct TTILS {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Interrupt Line Select Register"]
pub mod ttils;
#[doc = "FDCAN TT Operation Status Register"]
pub struct TTOST {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Operation Status Register"]
pub mod ttost;
#[doc = "FDCAN TUR Numerator Actual Register"]
pub struct TURNA {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TUR Numerator Actual Register"]
pub mod turna;
#[doc = "FDCAN TT Local and Global Time Register"]
pub struct TTLGT {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Local and Global Time Register"]
pub mod ttlgt;
#[doc = "FDCAN TT Cycle Time and Count Register"]
pub struct TTCTC {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Cycle Time and Count Register"]
pub mod ttctc;
#[doc = "FDCAN TT Capture Time Register"]
pub struct TTCPT {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Capture Time Register"]
pub mod ttcpt;
#[doc = "FDCAN TT Cycle Sync Mark Register"]
pub struct TTCSM {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Cycle Sync Mark Register"]
pub mod ttcsm;
#[doc = "FDCAN TT Trigger Select Register"]
pub struct TTTS {
register: vcell::VolatileCell<u32>,
}
#[doc = "FDCAN TT Trigger Select Register"]
pub mod ttts;