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#[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - DMA2D control register"] pub cr: CR, #[doc = "0x04 - DMA2D Interrupt Status Register"] pub isr: ISR, #[doc = "0x08 - DMA2D interrupt flag clear register"] pub ifcr: IFCR, #[doc = "0x0c - DMA2D foreground memory address register"] pub fgmar: FGMAR, #[doc = "0x10 - DMA2D foreground offset register"] pub fgor: FGOR, #[doc = "0x14 - DMA2D background memory address register"] pub bgmar: BGMAR, #[doc = "0x18 - DMA2D background offset register"] pub bgor: BGOR, #[doc = "0x1c - DMA2D foreground PFC control register"] pub fgpfccr: FGPFCCR, #[doc = "0x20 - DMA2D foreground color register"] pub fgcolr: FGCOLR, #[doc = "0x24 - DMA2D background PFC control register"] pub bgpfccr: BGPFCCR, #[doc = "0x28 - DMA2D background color register"] pub bgcolr: BGCOLR, #[doc = "0x2c - DMA2D foreground CLUT memory address register"] pub fgcmar: FGCMAR, #[doc = "0x30 - DMA2D background CLUT memory address register"] pub bgcmar: BGCMAR, #[doc = "0x34 - DMA2D output PFC control register"] pub opfccr: OPFCCR, #[doc = "0x38 - DMA2D output color register"] pub ocolr: OCOLR, #[doc = "0x3c - DMA2D output memory address register"] pub omar: OMAR, #[doc = "0x40 - DMA2D output offset register"] pub oor: OOR, #[doc = "0x44 - DMA2D number of line register"] pub nlr: NLR, #[doc = "0x48 - DMA2D line watermark register"] pub lwr: LWR, #[doc = "0x4c - DMA2D AXI master timer configuration register"] pub amtcr: AMTCR, } #[doc = "DMA2D control register"] pub struct CR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D control register"] pub mod cr; #[doc = "DMA2D Interrupt Status Register"] pub struct ISR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D Interrupt Status Register"] pub mod isr; #[doc = "DMA2D interrupt flag clear register"] pub struct IFCR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D interrupt flag clear register"] pub mod ifcr; #[doc = "DMA2D foreground memory address register"] pub struct FGMAR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D foreground memory address register"] pub mod fgmar; #[doc = "DMA2D foreground offset register"] pub struct FGOR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D foreground offset register"] pub mod fgor; #[doc = "DMA2D background memory address register"] pub struct BGMAR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D background memory address register"] pub mod bgmar; #[doc = "DMA2D background offset register"] pub struct BGOR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D background offset register"] pub mod bgor; #[doc = "DMA2D foreground PFC control register"] pub struct FGPFCCR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D foreground PFC control register"] pub mod fgpfccr; #[doc = "DMA2D foreground color register"] pub struct FGCOLR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D foreground color register"] pub mod fgcolr; #[doc = "DMA2D background PFC control register"] pub struct BGPFCCR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D background PFC control register"] pub mod bgpfccr; #[doc = "DMA2D background color register"] pub struct BGCOLR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D background color register"] pub mod bgcolr; #[doc = "DMA2D foreground CLUT memory address register"] pub struct FGCMAR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D foreground CLUT memory address register"] pub mod fgcmar; #[doc = "DMA2D background CLUT memory address register"] pub struct BGCMAR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D background CLUT memory address register"] pub mod bgcmar; #[doc = "DMA2D output PFC control register"] pub struct OPFCCR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D output PFC control register"] pub mod opfccr; #[doc = "DMA2D output color register"] pub struct OCOLR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D output color register"] pub mod ocolr; #[doc = "DMA2D output memory address register"] pub struct OMAR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D output memory address register"] pub mod omar; #[doc = "DMA2D output offset register"] pub struct OOR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D output offset register"] pub mod oor; #[doc = "DMA2D number of line register"] pub struct NLR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D number of line register"] pub mod nlr; #[doc = "DMA2D line watermark register"] pub struct LWR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D line watermark register"] pub mod lwr; #[doc = "DMA2D AXI master timer configuration register"] pub struct AMTCR { register: vcell::VolatileCell<u32>, } #[doc = "DMA2D AXI master timer configuration register"] pub mod amtcr;