1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369
#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::PCR { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0x18 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = r"Value of the field"] pub struct PWAITENR { bits: bool, } impl PWAITENR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _PWAITENW<'a> { w: &'a mut W, } impl<'a> _PWAITENW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 1); self.w.bits |= ((value as u32) & 0x01) << 1; self.w } } #[doc = r"Value of the field"] pub struct PBKENR { bits: bool, } impl PBKENR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _PBKENW<'a> { w: &'a mut W, } impl<'a> _PBKENW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 2); self.w.bits |= ((value as u32) & 0x01) << 2; self.w } } #[doc = r"Value of the field"] pub struct PWIDR { bits: u8, } impl PWIDR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _PWIDW<'a> { w: &'a mut W, } impl<'a> _PWIDW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x03 << 4); self.w.bits |= ((value as u32) & 0x03) << 4; self.w } } #[doc = r"Value of the field"] pub struct ECCENR { bits: bool, } impl ECCENR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Proxy"] pub struct _ECCENW<'a> { w: &'a mut W, } impl<'a> _ECCENW<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(0x01 << 6); self.w.bits |= ((value as u32) & 0x01) << 6; self.w } } #[doc = r"Value of the field"] pub struct TCLRR { bits: u8, } impl TCLRR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _TCLRW<'a> { w: &'a mut W, } impl<'a> _TCLRW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x0f << 9); self.w.bits |= ((value as u32) & 0x0f) << 9; self.w } } #[doc = r"Value of the field"] pub struct TARR { bits: u8, } impl TARR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _TARW<'a> { w: &'a mut W, } impl<'a> _TARW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x0f << 13); self.w.bits |= ((value as u32) & 0x0f) << 13; self.w } } #[doc = r"Value of the field"] pub struct ECCPSR { bits: u8, } impl ECCPSR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _ECCPSW<'a> { w: &'a mut W, } impl<'a> _ECCPSW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x07 << 17); self.w.bits |= ((value as u32) & 0x07) << 17; self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 1 - Wait feature enable bit. This bit enables the Wait feature for the NAND Flash memory bank:"] #[inline(always)] pub fn pwaiten(&self) -> PWAITENR { let bits = ((self.bits >> 1) & 0x01) != 0; PWAITENR { bits } } #[doc = "Bit 2 - NAND Flash memory bank enable bit. This bit enables the memory bank. Accessing a disabled memory bank causes an ERROR on AXI bus"] #[inline(always)] pub fn pbken(&self) -> PBKENR { let bits = ((self.bits >> 2) & 0x01) != 0; PBKENR { bits } } #[doc = "Bits 4:5 - Data bus width. These bits define the external memory device width."] #[inline(always)] pub fn pwid(&self) -> PWIDR { let bits = ((self.bits >> 4) & 0x03) as u8; PWIDR { bits } } #[doc = "Bit 6 - ECC computation logic enable bit"] #[inline(always)] pub fn eccen(&self) -> ECCENR { let bits = ((self.bits >> 6) & 0x01) != 0; ECCENR { bits } } #[doc = "Bits 9:12 - CLE to RE delay. These bits set time from CLE low to RE low in number of KCK_FMC clock cycles. The time is give by the following formula: t_clr = (TCLR + SET + 2) TKCK_FMC where TKCK_FMC is the KCK_FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space."] #[inline(always)] pub fn tclr(&self) -> TCLRR { let bits = ((self.bits >> 9) & 0x0f) as u8; TCLRR { bits } } #[doc = "Bits 13:16 - ALE to RE delay. These bits set time from ALE low to RE low in number of KCK_FMC clock cycles. Time is: t_ar = (TAR + SET + 2) TKCK_FMC where TKCK_FMC is the FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space."] #[inline(always)] pub fn tar(&self) -> TARR { let bits = ((self.bits >> 13) & 0x0f) as u8; TARR { bits } } #[doc = "Bits 17:19 - ECC page size. These bits define the page size for the extended ECC:"] #[inline(always)] pub fn eccps(&self) -> ECCPSR { let bits = ((self.bits >> 17) & 0x07) as u8; ECCPSR { bits } } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 1 - Wait feature enable bit. This bit enables the Wait feature for the NAND Flash memory bank:"] #[inline(always)] pub fn pwaiten(&mut self) -> _PWAITENW { _PWAITENW { w: self } } #[doc = "Bit 2 - NAND Flash memory bank enable bit. This bit enables the memory bank. Accessing a disabled memory bank causes an ERROR on AXI bus"] #[inline(always)] pub fn pbken(&mut self) -> _PBKENW { _PBKENW { w: self } } #[doc = "Bits 4:5 - Data bus width. These bits define the external memory device width."] #[inline(always)] pub fn pwid(&mut self) -> _PWIDW { _PWIDW { w: self } } #[doc = "Bit 6 - ECC computation logic enable bit"] #[inline(always)] pub fn eccen(&mut self) -> _ECCENW { _ECCENW { w: self } } #[doc = "Bits 9:12 - CLE to RE delay. These bits set time from CLE low to RE low in number of KCK_FMC clock cycles. The time is give by the following formula: t_clr = (TCLR + SET + 2) TKCK_FMC where TKCK_FMC is the KCK_FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space."] #[inline(always)] pub fn tclr(&mut self) -> _TCLRW { _TCLRW { w: self } } #[doc = "Bits 13:16 - ALE to RE delay. These bits set time from ALE low to RE low in number of KCK_FMC clock cycles. Time is: t_ar = (TAR + SET + 2) TKCK_FMC where TKCK_FMC is the FMC clock period Note: Set is MEMSET or ATTSET according to the addressed space."] #[inline(always)] pub fn tar(&mut self) -> _TARW { _TARW { w: self } } #[doc = "Bits 17:19 - ECC page size. These bits define the page size for the extended ECC:"] #[inline(always)] pub fn eccps(&mut self) -> _ECCPSW { _ECCPSW { w: self } } }