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#[doc = r"Value read from the register"] pub struct R { bits: u32, } impl super::DMADSR { #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } } #[doc = r"Value of the field"] pub struct AXWHSTSR { bits: bool, } impl AXWHSTSR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } #[doc = r"Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r"Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r"Value of the field"] pub struct RPS0R { bits: u8, } impl RPS0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Value of the field"] pub struct TPS0R { bits: u8, } impl TPS0R { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 0 - AHB Master Write Channel"] #[inline(always)] pub fn axwhsts(&self) -> AXWHSTSR { let bits = ((self.bits >> 0) & 0x01) != 0; AXWHSTSR { bits } } #[doc = "Bits 8:11 - DMA Channel Receive Process State"] #[inline(always)] pub fn rps0(&self) -> RPS0R { let bits = ((self.bits >> 8) & 0x0f) as u8; RPS0R { bits } } #[doc = "Bits 12:15 - DMA Channel Transmit Process State"] #[inline(always)] pub fn tps0(&self) -> TPS0R { let bits = ((self.bits >> 12) & 0x0f) as u8; TPS0R { bits } } }