#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CCR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `DUAL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DUALR {
#[doc = "Independent mode"]
INDEPENDENT,
#[doc = "Dual, combined regular simultaneous + injected simultaneous mode"]
DUALRJ,
#[doc = "Dual, combined regular simultaneous + alternate trigger mode"]
DUALRA,
#[doc = "Dual, combined interleaved mode + injected simultaneous mode"]
DUALIJ,
#[doc = "Dual, injected simultaneous mode only"]
DUALJ,
#[doc = "Dual, regular simultaneous mode only"]
DUALR,
#[doc = "Dual, interleaved mode only"]
DUALI,
#[doc = "Dual, alternate trigger mode only"]
DUALA,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl DUALR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
DUALR::INDEPENDENT => 0,
DUALR::DUALRJ => 0x01,
DUALR::DUALRA => 0x02,
DUALR::DUALIJ => 0x03,
DUALR::DUALJ => 0x05,
DUALR::DUALR => 0x06,
DUALR::DUALI => 0x07,
DUALR::DUALA => 0x09,
DUALR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> DUALR {
match value {
0 => DUALR::INDEPENDENT,
1 => DUALR::DUALRJ,
2 => DUALR::DUALRA,
3 => DUALR::DUALIJ,
5 => DUALR::DUALJ,
6 => DUALR::DUALR,
7 => DUALR::DUALI,
9 => DUALR::DUALA,
i => DUALR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `INDEPENDENT`"]
#[inline(always)]
pub fn is_independent(&self) -> bool {
*self == DUALR::INDEPENDENT
}
#[doc = "Checks if the value of the field is `DUALRJ`"]
#[inline(always)]
pub fn is_dual_rj(&self) -> bool {
*self == DUALR::DUALRJ
}
#[doc = "Checks if the value of the field is `DUALRA`"]
#[inline(always)]
pub fn is_dual_ra(&self) -> bool {
*self == DUALR::DUALRA
}
#[doc = "Checks if the value of the field is `DUALIJ`"]
#[inline(always)]
pub fn is_dual_ij(&self) -> bool {
*self == DUALR::DUALIJ
}
#[doc = "Checks if the value of the field is `DUALJ`"]
#[inline(always)]
pub fn is_dual_j(&self) -> bool {
*self == DUALR::DUALJ
}
#[doc = "Checks if the value of the field is `DUALR`"]
#[inline(always)]
pub fn is_dual_r(&self) -> bool {
*self == DUALR::DUALR
}
#[doc = "Checks if the value of the field is `DUALI`"]
#[inline(always)]
pub fn is_dual_i(&self) -> bool {
*self == DUALR::DUALI
}
#[doc = "Checks if the value of the field is `DUALA`"]
#[inline(always)]
pub fn is_dual_a(&self) -> bool {
*self == DUALR::DUALA
}
}
#[doc = "Values that can be written to the field `DUAL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DUALW {
#[doc = "Independent mode"]
INDEPENDENT,
#[doc = "Dual, combined regular simultaneous + injected simultaneous mode"]
DUALRJ,
#[doc = "Dual, combined regular simultaneous + alternate trigger mode"]
DUALRA,
#[doc = "Dual, combined interleaved mode + injected simultaneous mode"]
DUALIJ,
#[doc = "Dual, injected simultaneous mode only"]
DUALJ,
#[doc = "Dual, regular simultaneous mode only"]
DUALR,
#[doc = "Dual, interleaved mode only"]
DUALI,
#[doc = "Dual, alternate trigger mode only"]
DUALA,
}
impl DUALW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
DUALW::INDEPENDENT => 0,
DUALW::DUALRJ => 1,
DUALW::DUALRA => 2,
DUALW::DUALIJ => 3,
DUALW::DUALJ => 5,
DUALW::DUALR => 6,
DUALW::DUALI => 7,
DUALW::DUALA => 9,
}
}
}
#[doc = r"Proxy"]
pub struct _DUALW<'a> {
w: &'a mut W,
}
impl<'a> _DUALW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DUALW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "Independent mode"]
#[inline(always)]
pub fn independent(self) -> &'a mut W {
self.variant(DUALW::INDEPENDENT)
}
#[doc = "Dual, combined regular simultaneous + injected simultaneous mode"]
#[inline(always)]
pub fn dual_rj(self) -> &'a mut W {
self.variant(DUALW::DUALRJ)
}
#[doc = "Dual, combined regular simultaneous + alternate trigger mode"]
#[inline(always)]
pub fn dual_ra(self) -> &'a mut W {
self.variant(DUALW::DUALRA)
}
#[doc = "Dual, combined interleaved mode + injected simultaneous mode"]
#[inline(always)]
pub fn dual_ij(self) -> &'a mut W {
self.variant(DUALW::DUALIJ)
}
#[doc = "Dual, injected simultaneous mode only"]
#[inline(always)]
pub fn dual_j(self) -> &'a mut W {
self.variant(DUALW::DUALJ)
}
#[doc = "Dual, regular simultaneous mode only"]
#[inline(always)]
pub fn dual_r(self) -> &'a mut W {
self.variant(DUALW::DUALR)
}
#[doc = "Dual, interleaved mode only"]
#[inline(always)]
pub fn dual_i(self) -> &'a mut W {
self.variant(DUALW::DUALI)
}
#[doc = "Dual, alternate trigger mode only"]
#[inline(always)]
pub fn dual_a(self) -> &'a mut W {
self.variant(DUALW::DUALA)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x1f << 0);
self.w.bits |= ((value as u32) & 0x1f) << 0;
self.w
}
}
#[doc = r"Value of the field"]
pub struct DELAYR {
bits: u8,
}
impl DELAYR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r"Proxy"]
pub struct _DELAYW<'a> {
w: &'a mut W,
}
impl<'a> _DELAYW<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 8);
self.w.bits |= ((value as u32) & 0x0f) << 8;
self.w
}
}
#[doc = "Possible values of the field `DAMDF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DAMDFR {
#[doc = "Without data packing, CDR/CDR2 not used"]
NOPACK,
#[doc = "CDR formatted for 32-bit down to 10-bit resolution"]
FORMAT32TO10,
#[doc = "CDR formatted for 8-bit resolution"]
FORMAT8,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl DAMDFR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
DAMDFR::NOPACK => 0,
DAMDFR::FORMAT32TO10 => 0x02,
DAMDFR::FORMAT8 => 0x03,
DAMDFR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> DAMDFR {
match value {
0 => DAMDFR::NOPACK,
2 => DAMDFR::FORMAT32TO10,
3 => DAMDFR::FORMAT8,
i => DAMDFR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `NOPACK`"]
#[inline(always)]
pub fn is_no_pack(&self) -> bool {
*self == DAMDFR::NOPACK
}
#[doc = "Checks if the value of the field is `FORMAT32TO10`"]
#[inline(always)]
pub fn is_format32to10(&self) -> bool {
*self == DAMDFR::FORMAT32TO10
}
#[doc = "Checks if the value of the field is `FORMAT8`"]
#[inline(always)]
pub fn is_format8(&self) -> bool {
*self == DAMDFR::FORMAT8
}
}
#[doc = "Values that can be written to the field `DAMDF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DAMDFW {
#[doc = "Without data packing, CDR/CDR2 not used"]
NOPACK,
#[doc = "CDR formatted for 32-bit down to 10-bit resolution"]
FORMAT32TO10,
#[doc = "CDR formatted for 8-bit resolution"]
FORMAT8,
}
impl DAMDFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
DAMDFW::NOPACK => 0,
DAMDFW::FORMAT32TO10 => 2,
DAMDFW::FORMAT8 => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _DAMDFW<'a> {
w: &'a mut W,
}
impl<'a> _DAMDFW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DAMDFW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "Without data packing, CDR/CDR2 not used"]
#[inline(always)]
pub fn no_pack(self) -> &'a mut W {
self.variant(DAMDFW::NOPACK)
}
#[doc = "CDR formatted for 32-bit down to 10-bit resolution"]
#[inline(always)]
pub fn format32to10(self) -> &'a mut W {
self.variant(DAMDFW::FORMAT32TO10)
}
#[doc = "CDR formatted for 8-bit resolution"]
#[inline(always)]
pub fn format8(self) -> &'a mut W {
self.variant(DAMDFW::FORMAT8)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x03 << 14);
self.w.bits |= ((value as u32) & 0x03) << 14;
self.w
}
}
#[doc = "Possible values of the field `CKMODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CKMODER {
#[doc = "Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock"]
ASYNCHRONOUS,
#[doc = "Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck"]
SYNCDIV1,
#[doc = "Use AHB clock rcc_hclk3 divided by 2"]
SYNCDIV2,
#[doc = "Use AHB clock rcc_hclk3 divided by 4"]
SYNCDIV4,
}
impl CKMODER {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
CKMODER::ASYNCHRONOUS => 0,
CKMODER::SYNCDIV1 => 0x01,
CKMODER::SYNCDIV2 => 0x02,
CKMODER::SYNCDIV4 => 0x03,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> CKMODER {
match value {
0 => CKMODER::ASYNCHRONOUS,
1 => CKMODER::SYNCDIV1,
2 => CKMODER::SYNCDIV2,
3 => CKMODER::SYNCDIV4,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `ASYNCHRONOUS`"]
#[inline(always)]
pub fn is_asynchronous(&self) -> bool {
*self == CKMODER::ASYNCHRONOUS
}
#[doc = "Checks if the value of the field is `SYNCDIV1`"]
#[inline(always)]
pub fn is_sync_div1(&self) -> bool {
*self == CKMODER::SYNCDIV1
}
#[doc = "Checks if the value of the field is `SYNCDIV2`"]
#[inline(always)]
pub fn is_sync_div2(&self) -> bool {
*self == CKMODER::SYNCDIV2
}
#[doc = "Checks if the value of the field is `SYNCDIV4`"]
#[inline(always)]
pub fn is_sync_div4(&self) -> bool {
*self == CKMODER::SYNCDIV4
}
}
#[doc = "Values that can be written to the field `CKMODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CKMODEW {
#[doc = "Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock"]
ASYNCHRONOUS,
#[doc = "Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck"]
SYNCDIV1,
#[doc = "Use AHB clock rcc_hclk3 divided by 2"]
SYNCDIV2,
#[doc = "Use AHB clock rcc_hclk3 divided by 4"]
SYNCDIV4,
}
impl CKMODEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
CKMODEW::ASYNCHRONOUS => 0,
CKMODEW::SYNCDIV1 => 1,
CKMODEW::SYNCDIV2 => 2,
CKMODEW::SYNCDIV4 => 3,
}
}
}
#[doc = r"Proxy"]
pub struct _CKMODEW<'a> {
w: &'a mut W,
}
impl<'a> _CKMODEW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CKMODEW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock"]
#[inline(always)]
pub fn asynchronous(self) -> &'a mut W {
self.variant(CKMODEW::ASYNCHRONOUS)
}
#[doc = "Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck"]
#[inline(always)]
pub fn sync_div1(self) -> &'a mut W {
self.variant(CKMODEW::SYNCDIV1)
}
#[doc = "Use AHB clock rcc_hclk3 divided by 2"]
#[inline(always)]
pub fn sync_div2(self) -> &'a mut W {
self.variant(CKMODEW::SYNCDIV2)
}
#[doc = "Use AHB clock rcc_hclk3 divided by 4"]
#[inline(always)]
pub fn sync_div4(self) -> &'a mut W {
self.variant(CKMODEW::SYNCDIV4)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x03 << 16);
self.w.bits |= ((value as u32) & 0x03) << 16;
self.w
}
}
#[doc = "Possible values of the field `PRESC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRESCR {
#[doc = "adc_ker_ck_input not divided"]
DIV1,
#[doc = "adc_ker_ck_input divided by 2"]
DIV2,
#[doc = "adc_ker_ck_input divided by 4"]
DIV4,
#[doc = "adc_ker_ck_input divided by 6"]
DIV6,
#[doc = "adc_ker_ck_input divided by 8"]
DIV8,
#[doc = "adc_ker_ck_input divided by 10"]
DIV10,
#[doc = "adc_ker_ck_input divided by 12"]
DIV12,
#[doc = "adc_ker_ck_input divided by 16"]
DIV16,
#[doc = "adc_ker_ck_input divided by 32"]
DIV32,
#[doc = "adc_ker_ck_input divided by 64"]
DIV64,
#[doc = "adc_ker_ck_input divided by 128"]
DIV128,
#[doc = "adc_ker_ck_input divided by 256"]
DIV256,
#[doc = r"Reserved"]
_Reserved(u8),
}
impl PRESCR {
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u8 {
match *self {
PRESCR::DIV1 => 0,
PRESCR::DIV2 => 0x01,
PRESCR::DIV4 => 0x02,
PRESCR::DIV6 => 0x03,
PRESCR::DIV8 => 0x04,
PRESCR::DIV10 => 0x05,
PRESCR::DIV12 => 0x06,
PRESCR::DIV16 => 0x07,
PRESCR::DIV32 => 0x08,
PRESCR::DIV64 => 0x09,
PRESCR::DIV128 => 0x0a,
PRESCR::DIV256 => 0x0b,
PRESCR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: u8) -> PRESCR {
match value {
0 => PRESCR::DIV1,
1 => PRESCR::DIV2,
2 => PRESCR::DIV4,
3 => PRESCR::DIV6,
4 => PRESCR::DIV8,
5 => PRESCR::DIV10,
6 => PRESCR::DIV12,
7 => PRESCR::DIV16,
8 => PRESCR::DIV32,
9 => PRESCR::DIV64,
10 => PRESCR::DIV128,
11 => PRESCR::DIV256,
i => PRESCR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `DIV1`"]
#[inline(always)]
pub fn is_div1(&self) -> bool {
*self == PRESCR::DIV1
}
#[doc = "Checks if the value of the field is `DIV2`"]
#[inline(always)]
pub fn is_div2(&self) -> bool {
*self == PRESCR::DIV2
}
#[doc = "Checks if the value of the field is `DIV4`"]
#[inline(always)]
pub fn is_div4(&self) -> bool {
*self == PRESCR::DIV4
}
#[doc = "Checks if the value of the field is `DIV6`"]
#[inline(always)]
pub fn is_div6(&self) -> bool {
*self == PRESCR::DIV6
}
#[doc = "Checks if the value of the field is `DIV8`"]
#[inline(always)]
pub fn is_div8(&self) -> bool {
*self == PRESCR::DIV8
}
#[doc = "Checks if the value of the field is `DIV10`"]
#[inline(always)]
pub fn is_div10(&self) -> bool {
*self == PRESCR::DIV10
}
#[doc = "Checks if the value of the field is `DIV12`"]
#[inline(always)]
pub fn is_div12(&self) -> bool {
*self == PRESCR::DIV12
}
#[doc = "Checks if the value of the field is `DIV16`"]
#[inline(always)]
pub fn is_div16(&self) -> bool {
*self == PRESCR::DIV16
}
#[doc = "Checks if the value of the field is `DIV32`"]
#[inline(always)]
pub fn is_div32(&self) -> bool {
*self == PRESCR::DIV32
}
#[doc = "Checks if the value of the field is `DIV64`"]
#[inline(always)]
pub fn is_div64(&self) -> bool {
*self == PRESCR::DIV64
}
#[doc = "Checks if the value of the field is `DIV128`"]
#[inline(always)]
pub fn is_div128(&self) -> bool {
*self == PRESCR::DIV128
}
#[doc = "Checks if the value of the field is `DIV256`"]
#[inline(always)]
pub fn is_div256(&self) -> bool {
*self == PRESCR::DIV256
}
}
#[doc = "Values that can be written to the field `PRESC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRESCW {
#[doc = "adc_ker_ck_input not divided"]
DIV1,
#[doc = "adc_ker_ck_input divided by 2"]
DIV2,
#[doc = "adc_ker_ck_input divided by 4"]
DIV4,
#[doc = "adc_ker_ck_input divided by 6"]
DIV6,
#[doc = "adc_ker_ck_input divided by 8"]
DIV8,
#[doc = "adc_ker_ck_input divided by 10"]
DIV10,
#[doc = "adc_ker_ck_input divided by 12"]
DIV12,
#[doc = "adc_ker_ck_input divided by 16"]
DIV16,
#[doc = "adc_ker_ck_input divided by 32"]
DIV32,
#[doc = "adc_ker_ck_input divided by 64"]
DIV64,
#[doc = "adc_ker_ck_input divided by 128"]
DIV128,
#[doc = "adc_ker_ck_input divided by 256"]
DIV256,
}
impl PRESCW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> u8 {
match *self {
PRESCW::DIV1 => 0,
PRESCW::DIV2 => 1,
PRESCW::DIV4 => 2,
PRESCW::DIV6 => 3,
PRESCW::DIV8 => 4,
PRESCW::DIV10 => 5,
PRESCW::DIV12 => 6,
PRESCW::DIV16 => 7,
PRESCW::DIV32 => 8,
PRESCW::DIV64 => 9,
PRESCW::DIV128 => 10,
PRESCW::DIV256 => 11,
}
}
}
#[doc = r"Proxy"]
pub struct _PRESCW<'a> {
w: &'a mut W,
}
impl<'a> _PRESCW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PRESCW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "adc_ker_ck_input not divided"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(PRESCW::DIV1)
}
#[doc = "adc_ker_ck_input divided by 2"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(PRESCW::DIV2)
}
#[doc = "adc_ker_ck_input divided by 4"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(PRESCW::DIV4)
}
#[doc = "adc_ker_ck_input divided by 6"]
#[inline(always)]
pub fn div6(self) -> &'a mut W {
self.variant(PRESCW::DIV6)
}
#[doc = "adc_ker_ck_input divided by 8"]
#[inline(always)]
pub fn div8(self) -> &'a mut W {
self.variant(PRESCW::DIV8)
}
#[doc = "adc_ker_ck_input divided by 10"]
#[inline(always)]
pub fn div10(self) -> &'a mut W {
self.variant(PRESCW::DIV10)
}
#[doc = "adc_ker_ck_input divided by 12"]
#[inline(always)]
pub fn div12(self) -> &'a mut W {
self.variant(PRESCW::DIV12)
}
#[doc = "adc_ker_ck_input divided by 16"]
#[inline(always)]
pub fn div16(self) -> &'a mut W {
self.variant(PRESCW::DIV16)
}
#[doc = "adc_ker_ck_input divided by 32"]
#[inline(always)]
pub fn div32(self) -> &'a mut W {
self.variant(PRESCW::DIV32)
}
#[doc = "adc_ker_ck_input divided by 64"]
#[inline(always)]
pub fn div64(self) -> &'a mut W {
self.variant(PRESCW::DIV64)
}
#[doc = "adc_ker_ck_input divided by 128"]
#[inline(always)]
pub fn div128(self) -> &'a mut W {
self.variant(PRESCW::DIV128)
}
#[doc = "adc_ker_ck_input divided by 256"]
#[inline(always)]
pub fn div256(self) -> &'a mut W {
self.variant(PRESCW::DIV256)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits &= !(0x0f << 18);
self.w.bits |= ((value as u32) & 0x0f) << 18;
self.w
}
}
#[doc = "Possible values of the field `VREFEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VREFENR {
#[doc = "V_REFINT channel disabled"]
DISABLED,
#[doc = "V_REFINT channel enabled"]
ENABLED,
}
impl VREFENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
VREFENR::DISABLED => false,
VREFENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> VREFENR {
match value {
false => VREFENR::DISABLED,
true => VREFENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == VREFENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == VREFENR::ENABLED
}
}
#[doc = "Values that can be written to the field `VREFEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VREFENW {
#[doc = "V_REFINT channel disabled"]
DISABLED,
#[doc = "V_REFINT channel enabled"]
ENABLED,
}
impl VREFENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
VREFENW::DISABLED => false,
VREFENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _VREFENW<'a> {
w: &'a mut W,
}
impl<'a> _VREFENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: VREFENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "V_REFINT channel disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(VREFENW::DISABLED)
}
#[doc = "V_REFINT channel enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(VREFENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 22);
self.w.bits |= ((value as u32) & 0x01) << 22;
self.w
}
}
#[doc = "Possible values of the field `VSENSEEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VSENSEENR {
#[doc = "Temperature sensor channel disabled"]
DISABLED,
#[doc = "Temperature sensor channel enabled"]
ENABLED,
}
impl VSENSEENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
VSENSEENR::DISABLED => false,
VSENSEENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> VSENSEENR {
match value {
false => VSENSEENR::DISABLED,
true => VSENSEENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == VSENSEENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == VSENSEENR::ENABLED
}
}
#[doc = "Values that can be written to the field `VSENSEEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VSENSEENW {
#[doc = "Temperature sensor channel disabled"]
DISABLED,
#[doc = "Temperature sensor channel enabled"]
ENABLED,
}
impl VSENSEENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
VSENSEENW::DISABLED => false,
VSENSEENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _VSENSEENW<'a> {
w: &'a mut W,
}
impl<'a> _VSENSEENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: VSENSEENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Temperature sensor channel disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(VSENSEENW::DISABLED)
}
#[doc = "Temperature sensor channel enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(VSENSEENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 23);
self.w.bits |= ((value as u32) & 0x01) << 23;
self.w
}
}
#[doc = "Possible values of the field `VBATEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VBATENR {
#[doc = "V_BAT channel disabled"]
DISABLED,
#[doc = "V_BAT channel enabled"]
ENABLED,
}
impl VBATENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
VBATENR::DISABLED => false,
VBATENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> VBATENR {
match value {
false => VBATENR::DISABLED,
true => VBATENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == VBATENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == VBATENR::ENABLED
}
}
#[doc = "Values that can be written to the field `VBATEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VBATENW {
#[doc = "V_BAT channel disabled"]
DISABLED,
#[doc = "V_BAT channel enabled"]
ENABLED,
}
impl VBATENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
VBATENW::DISABLED => false,
VBATENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _VBATENW<'a> {
w: &'a mut W,
}
impl<'a> _VBATENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: VBATENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "V_BAT channel disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(VBATENW::DISABLED)
}
#[doc = "V_BAT channel enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(VBATENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 24);
self.w.bits |= ((value as u32) & 0x01) << 24;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:4 - Dual ADC mode selection"]
#[inline(always)]
pub fn dual(&self) -> DUALR {
DUALR::_from(((self.bits >> 0) & 0x1f) as u8)
}
#[doc = "Bits 8:11 - Delay between 2 sampling phases"]
#[inline(always)]
pub fn delay(&self) -> DELAYR {
let bits = ((self.bits >> 8) & 0x0f) as u8;
DELAYR { bits }
}
#[doc = "Bits 14:15 - Dual ADC Mode Data Format"]
#[inline(always)]
pub fn damdf(&self) -> DAMDFR {
DAMDFR::_from(((self.bits >> 14) & 0x03) as u8)
}
#[doc = "Bits 16:17 - ADC clock mode"]
#[inline(always)]
pub fn ckmode(&self) -> CKMODER {
CKMODER::_from(((self.bits >> 16) & 0x03) as u8)
}
#[doc = "Bits 18:21 - ADC prescaler"]
#[inline(always)]
pub fn presc(&self) -> PRESCR {
PRESCR::_from(((self.bits >> 18) & 0x0f) as u8)
}
#[doc = "Bit 22 - VREFINT enable"]
#[inline(always)]
pub fn vrefen(&self) -> VREFENR {
VREFENR::_from(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - Temperature sensor enable"]
#[inline(always)]
pub fn vsenseen(&self) -> VSENSEENR {
VSENSEENR::_from(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 24 - VBAT enable"]
#[inline(always)]
pub fn vbaten(&self) -> VBATENR {
VBATENR::_from(((self.bits >> 24) & 0x01) != 0)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:4 - Dual ADC mode selection"]
#[inline(always)]
pub fn dual(&mut self) -> _DUALW {
_DUALW { w: self }
}
#[doc = "Bits 8:11 - Delay between 2 sampling phases"]
#[inline(always)]
pub fn delay(&mut self) -> _DELAYW {
_DELAYW { w: self }
}
#[doc = "Bits 14:15 - Dual ADC Mode Data Format"]
#[inline(always)]
pub fn damdf(&mut self) -> _DAMDFW {
_DAMDFW { w: self }
}
#[doc = "Bits 16:17 - ADC clock mode"]
#[inline(always)]
pub fn ckmode(&mut self) -> _CKMODEW {
_CKMODEW { w: self }
}
#[doc = "Bits 18:21 - ADC prescaler"]
#[inline(always)]
pub fn presc(&mut self) -> _PRESCW {
_PRESCW { w: self }
}
#[doc = "Bit 22 - VREFINT enable"]
#[inline(always)]
pub fn vrefen(&mut self) -> _VREFENW {
_VREFENW { w: self }
}
#[doc = "Bit 23 - Temperature sensor enable"]
#[inline(always)]
pub fn vsenseen(&mut self) -> _VSENSEENW {
_VSENSEENW { w: self }
}
#[doc = "Bit 24 - VBAT enable"]
#[inline(always)]
pub fn vbaten(&mut self) -> _VBATENW {
_VBATENW { w: self }
}
}