Module stm32h7::stm32h743::sdmmc1::fifor

The receive and transmit FIFOs can be only read or written as word (32-bit) wide registers. The FIFOs contain 16 entries on sequential addresses. This allows the CPU to use its load and store multiple operands to read from/write to the FIFO.When accessing SDMMC_FIFOR with half word or byte access an AHB bus fault is generated.

Structs

FIFODATAR	Value of the field
R	Value read from the register
W	Value to write to the register
_FIFODATAW	Proxy