#[doc = r"Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r"Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::C1_APB1LLPENR {
#[doc = r"Modifies the contents of the register"]
#[inline(always)]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
self.register.set(f(&R { bits }, &mut W { bits }).bits);
}
#[doc = r"Reads the contents of the register"]
#[inline(always)]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r"Writes to the register"]
#[inline(always)]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
self.register.set(
f(&mut W {
bits: Self::reset_value(),
})
.bits,
);
}
#[doc = r"Reset value of the register"]
#[inline(always)]
pub const fn reset_value() -> u32 {
0
}
#[doc = r"Writes the reset value to the register"]
#[inline(always)]
pub fn reset(&self) {
self.register.set(Self::reset_value())
}
}
#[doc = "Possible values of the field `TIM2LPEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2LPENR {
#[doc = "The selected clock is disabled during csleep mode"]
DISABLED,
#[doc = "The selected clock is enabled during csleep mode"]
ENABLED,
}
impl TIM2LPENR {
#[doc = r"Returns `true` if the bit is clear (0)"]
#[inline(always)]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r"Returns `true` if the bit is set (1)"]
#[inline(always)]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r"Value of the field as raw bits"]
#[inline(always)]
pub fn bit(&self) -> bool {
match *self {
TIM2LPENR::DISABLED => false,
TIM2LPENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _from(value: bool) -> TIM2LPENR {
match value {
false => TIM2LPENR::DISABLED,
true => TIM2LPENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == TIM2LPENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == TIM2LPENR::ENABLED
}
}
#[doc = "Values that can be written to the field `TIM2LPEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2LPENW {
#[doc = "The selected clock is disabled during csleep mode"]
DISABLED,
#[doc = "The selected clock is enabled during csleep mode"]
ENABLED,
}
impl TIM2LPENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline(always)]
pub fn _bits(&self) -> bool {
match *self {
TIM2LPENW::DISABLED => false,
TIM2LPENW::ENABLED => true,
}
}
}
#[doc = r"Proxy"]
pub struct _TIM2LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM2LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM2LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 0);
self.w.bits |= ((value as u32) & 0x01) << 0;
self.w
}
}
#[doc = "Possible values of the field `TIM3LPEN`"]
pub type TIM3LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM3LPEN`"]
pub type TIM3LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM3LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM3LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM3LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 1);
self.w.bits |= ((value as u32) & 0x01) << 1;
self.w
}
}
#[doc = "Possible values of the field `TIM4LPEN`"]
pub type TIM4LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM4LPEN`"]
pub type TIM4LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM4LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM4LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM4LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 2);
self.w.bits |= ((value as u32) & 0x01) << 2;
self.w
}
}
#[doc = "Possible values of the field `TIM5LPEN`"]
pub type TIM5LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM5LPEN`"]
pub type TIM5LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM5LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM5LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM5LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 3);
self.w.bits |= ((value as u32) & 0x01) << 3;
self.w
}
}
#[doc = "Possible values of the field `TIM6LPEN`"]
pub type TIM6LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM6LPEN`"]
pub type TIM6LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM6LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM6LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM6LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 4);
self.w.bits |= ((value as u32) & 0x01) << 4;
self.w
}
}
#[doc = "Possible values of the field `TIM7LPEN`"]
pub type TIM7LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM7LPEN`"]
pub type TIM7LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM7LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM7LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM7LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 5);
self.w.bits |= ((value as u32) & 0x01) << 5;
self.w
}
}
#[doc = "Possible values of the field `TIM12LPEN`"]
pub type TIM12LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM12LPEN`"]
pub type TIM12LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM12LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM12LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM12LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 6);
self.w.bits |= ((value as u32) & 0x01) << 6;
self.w
}
}
#[doc = "Possible values of the field `TIM13LPEN`"]
pub type TIM13LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM13LPEN`"]
pub type TIM13LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM13LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM13LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM13LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 7);
self.w.bits |= ((value as u32) & 0x01) << 7;
self.w
}
}
#[doc = "Possible values of the field `TIM14LPEN`"]
pub type TIM14LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `TIM14LPEN`"]
pub type TIM14LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _TIM14LPENW<'a> {
w: &'a mut W,
}
impl<'a> _TIM14LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM14LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 8);
self.w.bits |= ((value as u32) & 0x01) << 8;
self.w
}
}
#[doc = "Possible values of the field `LPTIM1LPEN`"]
pub type LPTIM1LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `LPTIM1LPEN`"]
pub type LPTIM1LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _LPTIM1LPENW<'a> {
w: &'a mut W,
}
impl<'a> _LPTIM1LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LPTIM1LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 9);
self.w.bits |= ((value as u32) & 0x01) << 9;
self.w
}
}
#[doc = "Possible values of the field `SPI2LPEN`"]
pub type SPI2LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `SPI2LPEN`"]
pub type SPI2LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _SPI2LPENW<'a> {
w: &'a mut W,
}
impl<'a> _SPI2LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI2LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 14);
self.w.bits |= ((value as u32) & 0x01) << 14;
self.w
}
}
#[doc = "Possible values of the field `SPI3LPEN`"]
pub type SPI3LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `SPI3LPEN`"]
pub type SPI3LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _SPI3LPENW<'a> {
w: &'a mut W,
}
impl<'a> _SPI3LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI3LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 15);
self.w.bits |= ((value as u32) & 0x01) << 15;
self.w
}
}
#[doc = "Possible values of the field `SPDIFRXLPEN`"]
pub type SPDIFRXLPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `SPDIFRXLPEN`"]
pub type SPDIFRXLPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _SPDIFRXLPENW<'a> {
w: &'a mut W,
}
impl<'a> _SPDIFRXLPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPDIFRXLPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 16);
self.w.bits |= ((value as u32) & 0x01) << 16;
self.w
}
}
#[doc = "Possible values of the field `USART2LPEN`"]
pub type USART2LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `USART2LPEN`"]
pub type USART2LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _USART2LPENW<'a> {
w: &'a mut W,
}
impl<'a> _USART2LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART2LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 17);
self.w.bits |= ((value as u32) & 0x01) << 17;
self.w
}
}
#[doc = "Possible values of the field `USART3LPEN`"]
pub type USART3LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `USART3LPEN`"]
pub type USART3LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _USART3LPENW<'a> {
w: &'a mut W,
}
impl<'a> _USART3LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART3LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 18);
self.w.bits |= ((value as u32) & 0x01) << 18;
self.w
}
}
#[doc = "Possible values of the field `UART4LPEN`"]
pub type UART4LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `UART4LPEN`"]
pub type UART4LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _UART4LPENW<'a> {
w: &'a mut W,
}
impl<'a> _UART4LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART4LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 19);
self.w.bits |= ((value as u32) & 0x01) << 19;
self.w
}
}
#[doc = "Possible values of the field `UART5LPEN`"]
pub type UART5LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `UART5LPEN`"]
pub type UART5LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _UART5LPENW<'a> {
w: &'a mut W,
}
impl<'a> _UART5LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART5LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 20);
self.w.bits |= ((value as u32) & 0x01) << 20;
self.w
}
}
#[doc = "Possible values of the field `I2C1LPEN`"]
pub type I2C1LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `I2C1LPEN`"]
pub type I2C1LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _I2C1LPENW<'a> {
w: &'a mut W,
}
impl<'a> _I2C1LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C1LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 21);
self.w.bits |= ((value as u32) & 0x01) << 21;
self.w
}
}
#[doc = "Possible values of the field `I2C2LPEN`"]
pub type I2C2LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `I2C2LPEN`"]
pub type I2C2LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _I2C2LPENW<'a> {
w: &'a mut W,
}
impl<'a> _I2C2LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C2LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 22);
self.w.bits |= ((value as u32) & 0x01) << 22;
self.w
}
}
#[doc = "Possible values of the field `I2C3LPEN`"]
pub type I2C3LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `I2C3LPEN`"]
pub type I2C3LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _I2C3LPENW<'a> {
w: &'a mut W,
}
impl<'a> _I2C3LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C3LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 23);
self.w.bits |= ((value as u32) & 0x01) << 23;
self.w
}
}
#[doc = "Possible values of the field `CECLPEN`"]
pub type CECLPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `CECLPEN`"]
pub type CECLPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _CECLPENW<'a> {
w: &'a mut W,
}
impl<'a> _CECLPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CECLPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 27);
self.w.bits |= ((value as u32) & 0x01) << 27;
self.w
}
}
#[doc = "Possible values of the field `DAC12LPEN`"]
pub type DAC12LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `DAC12LPEN`"]
pub type DAC12LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _DAC12LPENW<'a> {
w: &'a mut W,
}
impl<'a> _DAC12LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DAC12LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 29);
self.w.bits |= ((value as u32) & 0x01) << 29;
self.w
}
}
#[doc = "Possible values of the field `USART7LPEN`"]
pub type USART7LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `USART7LPEN`"]
pub type USART7LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _USART7LPENW<'a> {
w: &'a mut W,
}
impl<'a> _USART7LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART7LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 30);
self.w.bits |= ((value as u32) & 0x01) << 30;
self.w
}
}
#[doc = "Possible values of the field `USART8LPEN`"]
pub type USART8LPENR = TIM2LPENR;
#[doc = "Values that can be written to the field `USART8LPEN`"]
pub type USART8LPENW = TIM2LPENW;
#[doc = r"Proxy"]
pub struct _USART8LPENW<'a> {
w: &'a mut W,
}
impl<'a> _USART8LPENW<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART8LPENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The selected clock is disabled during csleep mode"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2LPENW::DISABLED)
}
#[doc = "The selected clock is enabled during csleep mode"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2LPENW::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits &= !(0x01 << 31);
self.w.bits |= ((value as u32) & 0x01) << 31;
self.w
}
}
impl R {
#[doc = r"Value of the register as raw bits"]
#[inline(always)]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - TIM2 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim2lpen(&self) -> TIM2LPENR {
TIM2LPENR::_from(((self.bits >> 0) & 0x01) != 0)
}
#[doc = "Bit 1 - TIM3 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim3lpen(&self) -> TIM3LPENR {
TIM3LPENR::_from(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - TIM4 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim4lpen(&self) -> TIM4LPENR {
TIM4LPENR::_from(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - TIM5 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim5lpen(&self) -> TIM5LPENR {
TIM5LPENR::_from(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - TIM6 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim6lpen(&self) -> TIM6LPENR {
TIM6LPENR::_from(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - TIM7 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim7lpen(&self) -> TIM7LPENR {
TIM7LPENR::_from(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - TIM12 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim12lpen(&self) -> TIM12LPENR {
TIM12LPENR::_from(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - TIM13 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim13lpen(&self) -> TIM13LPENR {
TIM13LPENR::_from(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - TIM14 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim14lpen(&self) -> TIM14LPENR {
TIM14LPENR::_from(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - LPTIM1 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn lptim1lpen(&self) -> LPTIM1LPENR {
LPTIM1LPENR::_from(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI2 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn spi2lpen(&self) -> SPI2LPENR {
SPI2LPENR::_from(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - SPI3 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn spi3lpen(&self) -> SPI3LPENR {
SPI3LPENR::_from(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - SPDIFRX Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn spdifrxlpen(&self) -> SPDIFRXLPENR {
SPDIFRXLPENR::_from(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - USART2 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart2lpen(&self) -> USART2LPENR {
USART2LPENR::_from(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - USART3 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart3lpen(&self) -> USART3LPENR {
USART3LPENR::_from(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 19 - UART4 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn uart4lpen(&self) -> UART4LPENR {
UART4LPENR::_from(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - UART5 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn uart5lpen(&self) -> UART5LPENR {
UART5LPENR::_from(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C1 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn i2c1lpen(&self) -> I2C1LPENR {
I2C1LPENR::_from(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C2 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn i2c2lpen(&self) -> I2C2LPENR {
I2C2LPENR::_from(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - I2C3 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn i2c3lpen(&self) -> I2C3LPENR {
I2C3LPENR::_from(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 27 - HDMI-CEC Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn ceclpen(&self) -> CECLPENR {
CECLPENR::_from(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC1/2 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn dac12lpen(&self) -> DAC12LPENR {
DAC12LPENR::_from(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 30 - USART7 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart7lpen(&self) -> USART7LPENR {
USART7LPENR::_from(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - USART8 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart8lpen(&self) -> USART8LPENR {
USART8LPENR::_from(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = r"Writes raw bits to the register"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - TIM2 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim2lpen(&mut self) -> _TIM2LPENW {
_TIM2LPENW { w: self }
}
#[doc = "Bit 1 - TIM3 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim3lpen(&mut self) -> _TIM3LPENW {
_TIM3LPENW { w: self }
}
#[doc = "Bit 2 - TIM4 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim4lpen(&mut self) -> _TIM4LPENW {
_TIM4LPENW { w: self }
}
#[doc = "Bit 3 - TIM5 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim5lpen(&mut self) -> _TIM5LPENW {
_TIM5LPENW { w: self }
}
#[doc = "Bit 4 - TIM6 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim6lpen(&mut self) -> _TIM6LPENW {
_TIM6LPENW { w: self }
}
#[doc = "Bit 5 - TIM7 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim7lpen(&mut self) -> _TIM7LPENW {
_TIM7LPENW { w: self }
}
#[doc = "Bit 6 - TIM12 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim12lpen(&mut self) -> _TIM12LPENW {
_TIM12LPENW { w: self }
}
#[doc = "Bit 7 - TIM13 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim13lpen(&mut self) -> _TIM13LPENW {
_TIM13LPENW { w: self }
}
#[doc = "Bit 8 - TIM14 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn tim14lpen(&mut self) -> _TIM14LPENW {
_TIM14LPENW { w: self }
}
#[doc = "Bit 9 - LPTIM1 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn lptim1lpen(&mut self) -> _LPTIM1LPENW {
_LPTIM1LPENW { w: self }
}
#[doc = "Bit 14 - SPI2 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn spi2lpen(&mut self) -> _SPI2LPENW {
_SPI2LPENW { w: self }
}
#[doc = "Bit 15 - SPI3 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn spi3lpen(&mut self) -> _SPI3LPENW {
_SPI3LPENW { w: self }
}
#[doc = "Bit 16 - SPDIFRX Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn spdifrxlpen(&mut self) -> _SPDIFRXLPENW {
_SPDIFRXLPENW { w: self }
}
#[doc = "Bit 17 - USART2 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart2lpen(&mut self) -> _USART2LPENW {
_USART2LPENW { w: self }
}
#[doc = "Bit 18 - USART3 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart3lpen(&mut self) -> _USART3LPENW {
_USART3LPENW { w: self }
}
#[doc = "Bit 19 - UART4 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn uart4lpen(&mut self) -> _UART4LPENW {
_UART4LPENW { w: self }
}
#[doc = "Bit 20 - UART5 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn uart5lpen(&mut self) -> _UART5LPENW {
_UART5LPENW { w: self }
}
#[doc = "Bit 21 - I2C1 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn i2c1lpen(&mut self) -> _I2C1LPENW {
_I2C1LPENW { w: self }
}
#[doc = "Bit 22 - I2C2 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn i2c2lpen(&mut self) -> _I2C2LPENW {
_I2C2LPENW { w: self }
}
#[doc = "Bit 23 - I2C3 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn i2c3lpen(&mut self) -> _I2C3LPENW {
_I2C3LPENW { w: self }
}
#[doc = "Bit 27 - HDMI-CEC Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn ceclpen(&mut self) -> _CECLPENW {
_CECLPENW { w: self }
}
#[doc = "Bit 29 - DAC1/2 peripheral clock enable during CSleep mode"]
#[inline(always)]
pub fn dac12lpen(&mut self) -> _DAC12LPENW {
_DAC12LPENW { w: self }
}
#[doc = "Bit 30 - USART7 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart7lpen(&mut self) -> _USART7LPENW {
_USART7LPENW { w: self }
}
#[doc = "Bit 31 - USART8 Peripheral Clocks Enable During CSleep Mode"]
#[inline(always)]
pub fn usart8lpen(&mut self) -> _USART8LPENW {
_USART8LPENW { w: self }
}
}