#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - clock control register"]
    pub cr: CR,
    #[doc = "0x04 - RCC Internal Clock Source Calibration Register"]
    pub icscr: ICSCR,
    #[doc = "0x08 - RCC Clock Recovery RC Register"]
    pub crrcr: CRRCR,
    _reserved3: [u8; 4usize],
    #[doc = "0x10 - RCC Clock Configuration Register"]
    pub cfgr: CFGR,
    _reserved4: [u8; 4usize],
    #[doc = "0x18 - RCC Domain 1 Clock Configuration Register"]
    pub d1cfgr: D1CFGR,
    #[doc = "0x1c - RCC Domain 2 Clock Configuration Register"]
    pub d2cfgr: D2CFGR,
    #[doc = "0x20 - RCC Domain 3 Clock Configuration Register"]
    pub d3cfgr: D3CFGR,
    _reserved7: [u8; 4usize],
    #[doc = "0x28 - RCC PLLs Clock Source Selection Register"]
    pub pllckselr: PLLCKSELR,
    #[doc = "0x2c - RCC PLLs Configuration Register"]
    pub pllcfgr: PLLCFGR,
    #[doc = "0x30 - RCC PLL1 Dividers Configuration Register"]
    pub pll1divr: PLL1DIVR,
    #[doc = "0x34 - RCC PLL1 Fractional Divider Register"]
    pub pll1fracr: PLL1FRACR,
    #[doc = "0x38 - RCC PLL2 Dividers Configuration Register"]
    pub pll2divr: PLL2DIVR,
    #[doc = "0x3c - RCC PLL2 Fractional Divider Register"]
    pub pll2fracr: PLL2FRACR,
    #[doc = "0x40 - RCC PLL3 Dividers Configuration Register"]
    pub pll3divr: PLL3DIVR,
    #[doc = "0x44 - RCC PLL3 Fractional Divider Register"]
    pub pll3fracr: PLL3FRACR,
    _reserved15: [u8; 4usize],
    #[doc = "0x4c - RCC Domain 1 Kernel Clock Configuration Register"]
    pub d1ccipr: D1CCIPR,
    #[doc = "0x50 - RCC Domain 2 Kernel Clock Configuration Register"]
    pub d2ccip1r: D2CCIP1R,
    #[doc = "0x54 - RCC Domain 2 Kernel Clock Configuration Register"]
    pub d2ccip2r: D2CCIP2R,
    #[doc = "0x58 - RCC Domain 3 Kernel Clock Configuration Register"]
    pub d3ccipr: D3CCIPR,
    _reserved19: [u8; 4usize],
    #[doc = "0x60 - RCC Clock Source Interrupt Enable Register"]
    pub cier: CIER,
    #[doc = "0x64 - RCC Clock Source Interrupt Flag Register"]
    pub cifr: CIFR,
    #[doc = "0x68 - RCC Clock Source Interrupt Clear Register"]
    pub cicr: CICR,
    _reserved22: [u8; 4usize],
    #[doc = "0x70 - RCC Backup Domain Control Register"]
    pub bdcr: BDCR,
    #[doc = "0x74 - RCC Clock Control and Status Register"]
    pub csr: CSR,
    _reserved24: [u8; 4usize],
    #[doc = "0x7c - RCC AHB3 Reset Register"]
    pub ahb3rstr: AHB3RSTR,
    #[doc = "0x80 - RCC AHB1 Peripheral Reset Register"]
    pub ahb1rstr: AHB1RSTR,
    #[doc = "0x84 - RCC AHB2 Peripheral Reset Register"]
    pub ahb2rstr: AHB2RSTR,
    #[doc = "0x88 - RCC AHB4 Peripheral Reset Register"]
    pub ahb4rstr: AHB4RSTR,
    #[doc = "0x8c - RCC APB3 Peripheral Reset Register"]
    pub apb3rstr: APB3RSTR,
    #[doc = "0x90 - RCC APB1 Peripheral Reset Register"]
    pub apb1lrstr: APB1LRSTR,
    #[doc = "0x94 - RCC APB1 Peripheral Reset Register"]
    pub apb1hrstr: APB1HRSTR,
    #[doc = "0x98 - RCC APB2 Peripheral Reset Register"]
    pub apb2rstr: APB2RSTR,
    #[doc = "0x9c - RCC APB4 Peripheral Reset Register"]
    pub apb4rstr: APB4RSTR,
    #[doc = "0xa0 - RCC Global Control Register"]
    pub gcr: GCR,
    _reserved34: [u8; 4usize],
    #[doc = "0xa8 - RCC D3 Autonomous mode Register"]
    pub d3amr: D3AMR,
    _reserved35: [u8; 36usize],
    #[doc = "0xd0 - RCC Reset Status Register"]
    pub rsr: RSR,
    #[doc = "0xd4 - RCC AHB3 Clock Register"]
    pub ahb3enr: AHB3ENR,
    #[doc = "0xd8 - RCC AHB1 Clock Register"]
    pub ahb1enr: AHB1ENR,
    #[doc = "0xdc - RCC AHB2 Clock Register"]
    pub ahb2enr: AHB2ENR,
    #[doc = "0xe0 - RCC AHB4 Clock Register"]
    pub ahb4enr: AHB4ENR,
    #[doc = "0xe4 - RCC APB3 Clock Register"]
    pub apb3enr: APB3ENR,
    #[doc = "0xe8 - RCC APB1 Clock Register"]
    pub apb1lenr: APB1LENR,
    #[doc = "0xec - RCC APB1 Clock Register"]
    pub apb1henr: APB1HENR,
    #[doc = "0xf0 - RCC APB2 Clock Register"]
    pub apb2enr: APB2ENR,
    #[doc = "0xf4 - RCC APB4 Clock Register"]
    pub apb4enr: APB4ENR,
    _reserved45: [u8; 4usize],
    #[doc = "0xfc - RCC AHB3 Sleep Clock Register"]
    pub ahb3lpenr: AHB3LPENR,
    #[doc = "0x100 - RCC AHB1 Sleep Clock Register"]
    pub ahb1lpenr: AHB1LPENR,
    #[doc = "0x104 - RCC AHB2 Sleep Clock Register"]
    pub ahb2lpenr: AHB2LPENR,
    #[doc = "0x108 - RCC AHB4 Sleep Clock Register"]
    pub ahb4lpenr: AHB4LPENR,
    #[doc = "0x10c - RCC APB3 Sleep Clock Register"]
    pub apb3lpenr: APB3LPENR,
    #[doc = "0x110 - RCC APB1 Low Sleep Clock Register"]
    pub apb1llpenr: APB1LLPENR,
    #[doc = "0x114 - RCC APB1 High Sleep Clock Register"]
    pub apb1hlpenr: APB1HLPENR,
    #[doc = "0x118 - RCC APB2 Sleep Clock Register"]
    pub apb2lpenr: APB2LPENR,
    #[doc = "0x11c - RCC APB4 Sleep Clock Register"]
    pub apb4lpenr: APB4LPENR,
    _reserved54: [u8; 16usize],
    #[doc = "0x130 - RCC Reset Status Register"]
    pub c1_rsr: C1_RSR,
    #[doc = "0x134 - RCC AHB3 Clock Register"]
    pub c1_ahb3enr: C1_AHB3ENR,
    #[doc = "0x138 - RCC AHB1 Clock Register"]
    pub c1_ahb1enr: C1_AHB1ENR,
    #[doc = "0x13c - RCC AHB2 Clock Register"]
    pub c1_ahb2enr: C1_AHB2ENR,
    #[doc = "0x140 - RCC AHB4 Clock Register"]
    pub c1_ahb4enr: C1_AHB4ENR,
    #[doc = "0x144 - RCC APB3 Clock Register"]
    pub c1_apb3enr: C1_APB3ENR,
    #[doc = "0x148 - RCC APB1 Clock Register"]
    pub c1_apb1lenr: C1_APB1LENR,
    #[doc = "0x14c - RCC APB1 Clock Register"]
    pub c1_apb1henr: C1_APB1HENR,
    #[doc = "0x150 - RCC APB2 Clock Register"]
    pub c1_apb2enr: C1_APB2ENR,
    #[doc = "0x154 - RCC APB4 Clock Register"]
    pub c1_apb4enr: C1_APB4ENR,
    _reserved64: [u8; 4usize],
    #[doc = "0x15c - RCC AHB3 Sleep Clock Register"]
    pub c1_ahb3lpenr: C1_AHB3LPENR,
    #[doc = "0x160 - RCC AHB1 Sleep Clock Register"]
    pub c1_ahb1lpenr: C1_AHB1LPENR,
    #[doc = "0x164 - RCC AHB2 Sleep Clock Register"]
    pub c1_ahb2lpenr: C1_AHB2LPENR,
    #[doc = "0x168 - RCC AHB4 Sleep Clock Register"]
    pub c1_ahb4lpenr: C1_AHB4LPENR,
    #[doc = "0x16c - RCC APB3 Sleep Clock Register"]
    pub c1_apb3lpenr: C1_APB3LPENR,
    #[doc = "0x170 - RCC APB1 Low Sleep Clock Register"]
    pub c1_apb1llpenr: C1_APB1LLPENR,
    #[doc = "0x174 - RCC APB1 High Sleep Clock Register"]
    pub c1_apb1hlpenr: C1_APB1HLPENR,
    #[doc = "0x178 - RCC APB2 Sleep Clock Register"]
    pub c1_apb2lpenr: C1_APB2LPENR,
    #[doc = "0x17c - RCC APB4 Sleep Clock Register"]
    pub c1_apb4lpenr: C1_APB4LPENR,
}
#[doc = "clock control register"]
pub struct CR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "clock control register"]
pub mod cr;
#[doc = "RCC Internal Clock Source Calibration Register"]
pub struct ICSCR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Internal Clock Source Calibration Register"]
pub mod icscr;
#[doc = "RCC Clock Recovery RC Register"]
pub struct CRRCR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Clock Recovery RC Register"]
pub mod crrcr;
#[doc = "RCC Clock Configuration Register"]
pub struct CFGR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Clock Configuration Register"]
pub mod cfgr;
#[doc = "RCC Domain 1 Clock Configuration Register"]
pub struct D1CFGR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 1 Clock Configuration Register"]
pub mod d1cfgr;
#[doc = "RCC Domain 2 Clock Configuration Register"]
pub struct D2CFGR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 2 Clock Configuration Register"]
pub mod d2cfgr;
#[doc = "RCC Domain 3 Clock Configuration Register"]
pub struct D3CFGR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 3 Clock Configuration Register"]
pub mod d3cfgr;
#[doc = "RCC PLLs Clock Source Selection Register"]
pub struct PLLCKSELR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLLs Clock Source Selection Register"]
pub mod pllckselr;
#[doc = "RCC PLLs Configuration Register"]
pub struct PLLCFGR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLLs Configuration Register"]
pub mod pllcfgr;
#[doc = "RCC PLL1 Dividers Configuration Register"]
pub struct PLL1DIVR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLL1 Dividers Configuration Register"]
pub mod pll1divr;
#[doc = "RCC PLL1 Fractional Divider Register"]
pub struct PLL1FRACR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLL1 Fractional Divider Register"]
pub mod pll1fracr;
#[doc = "RCC PLL2 Dividers Configuration Register"]
pub struct PLL2DIVR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLL2 Dividers Configuration Register"]
pub mod pll2divr;
#[doc = "RCC PLL2 Fractional Divider Register"]
pub struct PLL2FRACR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLL2 Fractional Divider Register"]
pub mod pll2fracr;
#[doc = "RCC PLL3 Dividers Configuration Register"]
pub struct PLL3DIVR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLL3 Dividers Configuration Register"]
pub mod pll3divr;
#[doc = "RCC PLL3 Fractional Divider Register"]
pub struct PLL3FRACR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC PLL3 Fractional Divider Register"]
pub mod pll3fracr;
#[doc = "RCC Domain 1 Kernel Clock Configuration Register"]
pub struct D1CCIPR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 1 Kernel Clock Configuration Register"]
pub mod d1ccipr;
#[doc = "RCC Domain 2 Kernel Clock Configuration Register"]
pub struct D2CCIP1R {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 2 Kernel Clock Configuration Register"]
pub mod d2ccip1r;
#[doc = "RCC Domain 2 Kernel Clock Configuration Register"]
pub struct D2CCIP2R {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 2 Kernel Clock Configuration Register"]
pub mod d2ccip2r;
#[doc = "RCC Domain 3 Kernel Clock Configuration Register"]
pub struct D3CCIPR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Domain 3 Kernel Clock Configuration Register"]
pub mod d3ccipr;
#[doc = "RCC Clock Source Interrupt Enable Register"]
pub struct CIER {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Clock Source Interrupt Enable Register"]
pub mod cier;
#[doc = "RCC Clock Source Interrupt Flag Register"]
pub struct CIFR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Clock Source Interrupt Flag Register"]
pub mod cifr;
#[doc = "RCC Clock Source Interrupt Clear Register"]
pub struct CICR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Clock Source Interrupt Clear Register"]
pub mod cicr;
#[doc = "RCC Backup Domain Control Register"]
pub struct BDCR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Backup Domain Control Register"]
pub mod bdcr;
#[doc = "RCC Clock Control and Status Register"]
pub struct CSR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Clock Control and Status Register"]
pub mod csr;
#[doc = "RCC AHB3 Reset Register"]
pub struct AHB3RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB3 Reset Register"]
pub mod ahb3rstr;
#[doc = "RCC AHB1 Peripheral Reset Register"]
pub struct AHB1RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB1 Peripheral Reset Register"]
pub mod ahb1rstr;
#[doc = "RCC AHB2 Peripheral Reset Register"]
pub struct AHB2RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB2 Peripheral Reset Register"]
pub mod ahb2rstr;
#[doc = "RCC AHB4 Peripheral Reset Register"]
pub struct AHB4RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB4 Peripheral Reset Register"]
pub mod ahb4rstr;
#[doc = "RCC APB3 Peripheral Reset Register"]
pub struct APB3RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB3 Peripheral Reset Register"]
pub mod apb3rstr;
#[doc = "RCC APB1 Peripheral Reset Register"]
pub struct APB1LRSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Peripheral Reset Register"]
pub mod apb1lrstr;
#[doc = "RCC APB1 Peripheral Reset Register"]
pub struct APB1HRSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Peripheral Reset Register"]
pub mod apb1hrstr;
#[doc = "RCC APB2 Peripheral Reset Register"]
pub struct APB2RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB2 Peripheral Reset Register"]
pub mod apb2rstr;
#[doc = "RCC APB4 Peripheral Reset Register"]
pub struct APB4RSTR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB4 Peripheral Reset Register"]
pub mod apb4rstr;
#[doc = "RCC Global Control Register"]
pub struct GCR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Global Control Register"]
pub mod gcr;
#[doc = "RCC D3 Autonomous mode Register"]
pub struct D3AMR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC D3 Autonomous mode Register"]
pub mod d3amr;
#[doc = "RCC Reset Status Register"]
pub struct RSR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Reset Status Register"]
pub mod rsr;
#[doc = "RCC Reset Status Register"]
pub struct C1_RSR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC Reset Status Register"]
pub mod c1_rsr;
#[doc = "RCC AHB3 Clock Register"]
pub struct C1_AHB3ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB3 Clock Register"]
pub mod c1_ahb3enr;
#[doc = "RCC AHB3 Clock Register"]
pub struct AHB3ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB3 Clock Register"]
pub mod ahb3enr;
#[doc = "RCC AHB1 Clock Register"]
pub struct AHB1ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB1 Clock Register"]
pub mod ahb1enr;
#[doc = "RCC AHB1 Clock Register"]
pub struct C1_AHB1ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB1 Clock Register"]
pub mod c1_ahb1enr;
#[doc = "RCC AHB2 Clock Register"]
pub struct C1_AHB2ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB2 Clock Register"]
pub mod c1_ahb2enr;
#[doc = "RCC AHB2 Clock Register"]
pub struct AHB2ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB2 Clock Register"]
pub mod ahb2enr;
#[doc = "RCC AHB4 Clock Register"]
pub struct AHB4ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB4 Clock Register"]
pub mod ahb4enr;
#[doc = "RCC AHB4 Clock Register"]
pub struct C1_AHB4ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB4 Clock Register"]
pub mod c1_ahb4enr;
#[doc = "RCC APB3 Clock Register"]
pub struct C1_APB3ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB3 Clock Register"]
pub mod c1_apb3enr;
#[doc = "RCC APB3 Clock Register"]
pub struct APB3ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB3 Clock Register"]
pub mod apb3enr;
#[doc = "RCC APB1 Clock Register"]
pub struct APB1LENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Clock Register"]
pub mod apb1lenr;
#[doc = "RCC APB1 Clock Register"]
pub struct C1_APB1LENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Clock Register"]
pub mod c1_apb1lenr;
#[doc = "RCC APB1 Clock Register"]
pub struct APB1HENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Clock Register"]
pub mod apb1henr;
#[doc = "RCC APB1 Clock Register"]
pub struct C1_APB1HENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Clock Register"]
pub mod c1_apb1henr;
#[doc = "RCC APB2 Clock Register"]
pub struct C1_APB2ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB2 Clock Register"]
pub mod c1_apb2enr;
#[doc = "RCC APB2 Clock Register"]
pub struct APB2ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB2 Clock Register"]
pub mod apb2enr;
#[doc = "RCC APB4 Clock Register"]
pub struct APB4ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB4 Clock Register"]
pub mod apb4enr;
#[doc = "RCC APB4 Clock Register"]
pub struct C1_APB4ENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB4 Clock Register"]
pub mod c1_apb4enr;
#[doc = "RCC AHB3 Sleep Clock Register"]
pub struct C1_AHB3LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB3 Sleep Clock Register"]
pub mod c1_ahb3lpenr;
#[doc = "RCC AHB3 Sleep Clock Register"]
pub struct AHB3LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB3 Sleep Clock Register"]
pub mod ahb3lpenr;
#[doc = "RCC AHB1 Sleep Clock Register"]
pub struct AHB1LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB1 Sleep Clock Register"]
pub mod ahb1lpenr;
#[doc = "RCC AHB1 Sleep Clock Register"]
pub struct C1_AHB1LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB1 Sleep Clock Register"]
pub mod c1_ahb1lpenr;
#[doc = "RCC AHB2 Sleep Clock Register"]
pub struct C1_AHB2LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB2 Sleep Clock Register"]
pub mod c1_ahb2lpenr;
#[doc = "RCC AHB2 Sleep Clock Register"]
pub struct AHB2LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB2 Sleep Clock Register"]
pub mod ahb2lpenr;
#[doc = "RCC AHB4 Sleep Clock Register"]
pub struct AHB4LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB4 Sleep Clock Register"]
pub mod ahb4lpenr;
#[doc = "RCC AHB4 Sleep Clock Register"]
pub struct C1_AHB4LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC AHB4 Sleep Clock Register"]
pub mod c1_ahb4lpenr;
#[doc = "RCC APB3 Sleep Clock Register"]
pub struct C1_APB3LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB3 Sleep Clock Register"]
pub mod c1_apb3lpenr;
#[doc = "RCC APB3 Sleep Clock Register"]
pub struct APB3LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB3 Sleep Clock Register"]
pub mod apb3lpenr;
#[doc = "RCC APB1 Low Sleep Clock Register"]
pub struct APB1LLPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Low Sleep Clock Register"]
pub mod apb1llpenr;
#[doc = "RCC APB1 Low Sleep Clock Register"]
pub struct C1_APB1LLPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 Low Sleep Clock Register"]
pub mod c1_apb1llpenr;
#[doc = "RCC APB1 High Sleep Clock Register"]
pub struct C1_APB1HLPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 High Sleep Clock Register"]
pub mod c1_apb1hlpenr;
#[doc = "RCC APB1 High Sleep Clock Register"]
pub struct APB1HLPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB1 High Sleep Clock Register"]
pub mod apb1hlpenr;
#[doc = "RCC APB2 Sleep Clock Register"]
pub struct APB2LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB2 Sleep Clock Register"]
pub mod apb2lpenr;
#[doc = "RCC APB2 Sleep Clock Register"]
pub struct C1_APB2LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB2 Sleep Clock Register"]
pub mod c1_apb2lpenr;
#[doc = "RCC APB4 Sleep Clock Register"]
pub struct C1_APB4LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB4 Sleep Clock Register"]
pub mod c1_apb4lpenr;
#[doc = "RCC APB4 Sleep Clock Register"]
pub struct APB4LPENR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "RCC APB4 Sleep Clock Register"]
pub mod apb4lpenr;