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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - OTG_HS control and status register"]
    pub gotgctl: GOTGCTL,
    #[doc = "0x04 - OTG_HS interrupt register"]
    pub gotgint: GOTGINT,
    #[doc = "0x08 - OTG_HS AHB configuration register"]
    pub gahbcfg: GAHBCFG,
    #[doc = "0x0c - OTG_HS USB configuration register"]
    pub gusbcfg: GUSBCFG,
    #[doc = "0x10 - OTG_HS reset register"]
    pub grstctl: GRSTCTL,
    #[doc = "0x14 - OTG_HS core interrupt register"]
    pub gintsts: GINTSTS,
    #[doc = "0x18 - OTG_HS interrupt mask register"]
    pub gintmsk: GINTMSK,
    _reserved_7_grxstsr: [u8; 4usize],
    _reserved_8_grxstsp: [u8; 4usize],
    #[doc = "0x24 - OTG_HS Receive FIFO size register"]
    pub grxfsiz: GRXFSIZ,
    _reserved_10_hnptxfsiz_host: [u8; 4usize],
    #[doc = "0x2c - OTG_HS nonperiodic transmit FIFO/queue status register"]
    pub gnptxsts: GNPTXSTS,
    _reserved12: [u8; 8usize],
    #[doc = "0x38 - OTG_HS general core configuration register"]
    pub gccfg: GCCFG,
    #[doc = "0x3c - OTG_HS core ID register"]
    pub cid: CID,
    _reserved14: [u8; 20usize],
    #[doc = "0x54 - OTG core LPM configuration register"]
    pub glpmcfg: GLPMCFG,
    _reserved15: [u8; 168usize],
    #[doc = "0x100 - OTG_HS Host periodic transmit FIFO size register"]
    pub hptxfsiz: HPTXFSIZ,
    #[doc = "0x104 - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf1: DIEPTXF1,
    #[doc = "0x108 - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf2: DIEPTXF2,
    _reserved18: [u8; 16usize],
    #[doc = "0x11c - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf3: DIEPTXF3,
    #[doc = "0x120 - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf4: DIEPTXF4,
    #[doc = "0x124 - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf5: DIEPTXF5,
    #[doc = "0x128 - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf6: DIEPTXF6,
    #[doc = "0x12c - OTG_HS device IN endpoint transmit FIFO size register"]
    pub dieptxf7: DIEPTXF7,
}
impl RegisterBlock {
    #[doc = "0x1c - OTG_HS Receive status debug read register (peripheral mode mode)"]
    #[inline(always)]
    pub fn grxstsr_device(&self) -> &GRXSTSR_DEVICE {
        unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const GRXSTSR_DEVICE) }
    }
    #[doc = "0x1c - OTG_HS Receive status debug read register (peripheral mode mode)"]
    #[inline(always)]
    pub fn grxstsr_device_mut(&self) -> &mut GRXSTSR_DEVICE {
        unsafe { &mut *(((self as *const Self) as *mut u8).add(28usize) as *mut GRXSTSR_DEVICE) }
    }
    #[doc = "0x1c - OTG_HS Receive status debug read register (host mode)"]
    #[inline(always)]
    pub fn grxstsr_host(&self) -> &GRXSTSR_HOST {
        unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const GRXSTSR_HOST) }
    }
    #[doc = "0x1c - OTG_HS Receive status debug read register (host mode)"]
    #[inline(always)]
    pub fn grxstsr_host_mut(&self) -> &mut GRXSTSR_HOST {
        unsafe { &mut *(((self as *const Self) as *mut u8).add(28usize) as *mut GRXSTSR_HOST) }
    }
    #[doc = "0x20 - OTG_HS status read and pop register (peripheral mode)"]
    #[inline(always)]
    pub fn grxstsp_device(&self) -> &GRXSTSP_DEVICE {
        unsafe { &*(((self as *const Self) as *const u8).add(32usize) as *const GRXSTSP_DEVICE) }
    }
    #[doc = "0x20 - OTG_HS status read and pop register (peripheral mode)"]
    #[inline(always)]
    pub fn grxstsp_device_mut(&self) -> &mut GRXSTSP_DEVICE {
        unsafe { &mut *(((self as *const Self) as *mut u8).add(32usize) as *mut GRXSTSP_DEVICE) }
    }
    #[doc = "0x20 - OTG_HS status read and pop register (host mode)"]
    #[inline(always)]
    pub fn grxstsp_host(&self) -> &GRXSTSP_HOST {
        unsafe { &*(((self as *const Self) as *const u8).add(32usize) as *const GRXSTSP_HOST) }
    }
    #[doc = "0x20 - OTG_HS status read and pop register (host mode)"]
    #[inline(always)]
    pub fn grxstsp_host_mut(&self) -> &mut GRXSTSP_HOST {
        unsafe { &mut *(((self as *const Self) as *mut u8).add(32usize) as *mut GRXSTSP_HOST) }
    }
    #[doc = "0x28 - Endpoint 0 transmit FIFO size (peripheral mode)"]
    #[inline(always)]
    pub fn dieptxf0_device(&self) -> &DIEPTXF0_DEVICE {
        unsafe { &*(((self as *const Self) as *const u8).add(40usize) as *const DIEPTXF0_DEVICE) }
    }
    #[doc = "0x28 - Endpoint 0 transmit FIFO size (peripheral mode)"]
    #[inline(always)]
    pub fn dieptxf0_device_mut(&self) -> &mut DIEPTXF0_DEVICE {
        unsafe { &mut *(((self as *const Self) as *mut u8).add(40usize) as *mut DIEPTXF0_DEVICE) }
    }
    #[doc = "0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)"]
    #[inline(always)]
    pub fn hnptxfsiz_host(&self) -> &HNPTXFSIZ_HOST {
        unsafe { &*(((self as *const Self) as *const u8).add(40usize) as *const HNPTXFSIZ_HOST) }
    }
    #[doc = "0x28 - OTG_HS nonperiodic transmit FIFO size register (host mode)"]
    #[inline(always)]
    pub fn hnptxfsiz_host_mut(&self) -> &mut HNPTXFSIZ_HOST {
        unsafe { &mut *(((self as *const Self) as *mut u8).add(40usize) as *mut HNPTXFSIZ_HOST) }
    }
}
#[doc = "OTG_HS control and status register"]
pub struct GOTGCTL {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS control and status register"]
pub mod gotgctl;
#[doc = "OTG_HS interrupt register"]
pub struct GOTGINT {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS interrupt register"]
pub mod gotgint;
#[doc = "OTG_HS AHB configuration register"]
pub struct GAHBCFG {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS AHB configuration register"]
pub mod gahbcfg;
#[doc = "OTG_HS USB configuration register"]
pub struct GUSBCFG {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS USB configuration register"]
pub mod gusbcfg;
#[doc = "OTG_HS reset register"]
pub struct GRSTCTL {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS reset register"]
pub mod grstctl;
#[doc = "OTG_HS core interrupt register"]
pub struct GINTSTS {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS core interrupt register"]
pub mod gintsts;
#[doc = "OTG_HS interrupt mask register"]
pub struct GINTMSK {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS interrupt mask register"]
pub mod gintmsk;
#[doc = "OTG_HS Receive status debug read register (host mode)"]
pub struct GRXSTSR_HOST {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS Receive status debug read register (host mode)"]
pub mod grxstsr_host;
#[doc = "OTG_HS status read and pop register (host mode)"]
pub struct GRXSTSP_HOST {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS status read and pop register (host mode)"]
pub mod grxstsp_host;
#[doc = "OTG_HS Receive FIFO size register"]
pub struct GRXFSIZ {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS Receive FIFO size register"]
pub mod grxfsiz;
#[doc = "OTG_HS nonperiodic transmit FIFO size register (host mode)"]
pub struct HNPTXFSIZ_HOST {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS nonperiodic transmit FIFO size register (host mode)"]
pub mod hnptxfsiz_host;
#[doc = "Endpoint 0 transmit FIFO size (peripheral mode)"]
pub struct DIEPTXF0_DEVICE {
    register: vcell::VolatileCell<u32>,
}
#[doc = "Endpoint 0 transmit FIFO size (peripheral mode)"]
pub mod dieptxf0_device;
#[doc = "OTG_HS nonperiodic transmit FIFO/queue status register"]
pub struct GNPTXSTS {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS nonperiodic transmit FIFO/queue status register"]
pub mod gnptxsts;
#[doc = "OTG_HS general core configuration register"]
pub struct GCCFG {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS general core configuration register"]
pub mod gccfg;
#[doc = "OTG_HS core ID register"]
pub struct CID {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS core ID register"]
pub mod cid;
#[doc = "OTG_HS Host periodic transmit FIFO size register"]
pub struct HPTXFSIZ {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS Host periodic transmit FIFO size register"]
pub mod hptxfsiz;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF1 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf1;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF2 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf2;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF3 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf3;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF4 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf4;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF5 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf5;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF6 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf6;
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub struct DIEPTXF7 {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS device IN endpoint transmit FIFO size register"]
pub mod dieptxf7;
#[doc = "OTG_HS Receive status debug read register (peripheral mode mode)"]
pub struct GRXSTSR_DEVICE {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS Receive status debug read register (peripheral mode mode)"]
pub mod grxstsr_device;
#[doc = "OTG_HS status read and pop register (peripheral mode)"]
pub struct GRXSTSP_DEVICE {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG_HS status read and pop register (peripheral mode)"]
pub mod grxstsp_device;
#[doc = "OTG core LPM configuration register"]
pub struct GLPMCFG {
    register: vcell::VolatileCell<u32>,
}
#[doc = "OTG core LPM configuration register"]
pub mod glpmcfg;