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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - GPIO port mode register"]
    pub moder: MODER,
    #[doc = "0x04 - GPIO port output type register"]
    pub otyper: OTYPER,
    #[doc = "0x08 - GPIO port output speed register"]
    pub ospeedr: OSPEEDR,
    #[doc = "0x0c - GPIO port pull-up/pull-down register"]
    pub pupdr: PUPDR,
    #[doc = "0x10 - GPIO port input data register"]
    pub idr: IDR,
    #[doc = "0x14 - GPIO port output data register"]
    pub odr: ODR,
    #[doc = "0x18 - GPIO port bit set/reset register"]
    pub bsrr: BSRR,
    #[doc = "0x1c - This register is used to lock the configuration of the port bits when a correct write sequence is applied to bit 16 (LCKK). The value of bits \\[15:0\\] is used to lock the configuration of the GPIO. During the write sequence, the value of LCKR\\[15:0\\] must not change. When the LOCK sequence has been applied on a port bit, the value of this port bit can no longer be modified until the next MCU reset or peripheral reset.A specific write sequence is used to write to the GPIOx_LCKR register. Only word access (32-bit long) is allowed during this locking sequence.Each lock bit freezes a specific configuration register (control and alternate function registers)."]
    pub lckr: LCKR,
    #[doc = "0x20 - GPIO alternate function low register"]
    pub afrl: AFRL,
    #[doc = "0x24 - GPIO alternate function high register"]
    pub afrh: AFRH,
}
#[doc = "GPIO port mode register"]
pub struct MODER {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port mode register"]
pub mod moder;
#[doc = "GPIO port output type register"]
pub struct OTYPER {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port output type register"]
pub mod otyper;
#[doc = "GPIO port output speed register"]
pub struct OSPEEDR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port output speed register"]
pub mod ospeedr;
#[doc = "GPIO port pull-up/pull-down register"]
pub struct PUPDR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port pull-up/pull-down register"]
pub mod pupdr;
#[doc = "GPIO port input data register"]
pub struct IDR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port input data register"]
pub mod idr;
#[doc = "GPIO port output data register"]
pub struct ODR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port output data register"]
pub mod odr;
#[doc = "GPIO port bit set/reset register"]
pub struct BSRR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO port bit set/reset register"]
pub mod bsrr;
#[doc = "This register is used to lock the configuration of the port bits when a correct write sequence is applied to bit 16 (LCKK). The value of bits \\[15:0\\] is used to lock the configuration of the GPIO. During the write sequence, the value of LCKR\\[15:0\\] must not change. When the LOCK sequence has been applied on a port bit, the value of this port bit can no longer be modified until the next MCU reset or peripheral reset.A specific write sequence is used to write to the GPIOx_LCKR register. Only word access (32-bit long) is allowed during this locking sequence.Each lock bit freezes a specific configuration register (control and alternate function registers)."]
pub struct LCKR {
    register: vcell::VolatileCell<u32>,
}
#[doc = "This register is used to lock the configuration of the port bits when a correct write sequence is applied to bit 16 (LCKK). The value of bits \\[15:0\\] is used to lock the configuration of the GPIO. During the write sequence, the value of LCKR\\[15:0\\] must not change. When the LOCK sequence has been applied on a port bit, the value of this port bit can no longer be modified until the next MCU reset or peripheral reset.A specific write sequence is used to write to the GPIOx_LCKR register. Only word access (32-bit long) is allowed during this locking sequence.Each lock bit freezes a specific configuration register (control and alternate function registers)."]
pub mod lckr;
#[doc = "GPIO alternate function low register"]
pub struct AFRL {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO alternate function low register"]
pub mod afrl;
#[doc = "GPIO alternate function high register"]
pub struct AFRH {
    register: vcell::VolatileCell<u32>,
}
#[doc = "GPIO alternate function high register"]
pub mod afrh;