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#[doc = r"Value read from the register"] pub struct R { bits: u32, } #[doc = r"Value to write to the register"] pub struct W { bits: u32, } impl super::MACLMIR { #[doc = r"Modifies the contents of the register"] #[inline(always)] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set(f(&R { bits }, &mut W { bits }).bits); } #[doc = r"Reads the contents of the register"] #[inline(always)] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r"Writes to the register"] #[inline(always)] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { self.register.set( f(&mut W { bits: Self::reset_value(), }) .bits, ); } #[doc = r"Reset value of the register"] #[inline(always)] pub const fn reset_value() -> u32 { 0 } #[doc = r"Writes the reset value to the register"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) } } #[doc = r"Value of the field"] pub struct LSIR { bits: u8, } impl LSIR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _LSIW<'a> { w: &'a mut W, } impl<'a> _LSIW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0xff << 0); self.w.bits |= ((value as u32) & 0xff) << 0; self.w } } #[doc = r"Value of the field"] pub struct DRSYNCRR { bits: u8, } impl DRSYNCRR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _DRSYNCRW<'a> { w: &'a mut W, } impl<'a> _DRSYNCRW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0x07 << 8); self.w.bits |= ((value as u32) & 0x07) << 8; self.w } } #[doc = r"Value of the field"] pub struct LMPDRIR { bits: u8, } impl LMPDRIR { #[doc = r"Value of the field as raw bits"] #[inline(always)] pub fn bits(&self) -> u8 { self.bits } } #[doc = r"Proxy"] pub struct _LMPDRIW<'a> { w: &'a mut W, } impl<'a> _LMPDRIW<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits &= !(0xff << 24); self.w.bits |= ((value as u32) & 0xff) << 24; self.w } } impl R { #[doc = r"Value of the register as raw bits"] #[inline(always)] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 0:7 - Log Sync Interval"] #[inline(always)] pub fn lsi(&self) -> LSIR { let bits = ((self.bits >> 0) & 0xff) as u8; LSIR { bits } } #[doc = "Bits 8:10 - Delay_Req to SYNC Ratio"] #[inline(always)] pub fn drsyncr(&self) -> DRSYNCRR { let bits = ((self.bits >> 8) & 0x07) as u8; DRSYNCRR { bits } } #[doc = "Bits 24:31 - Log Min Pdelay_Req Interval"] #[inline(always)] pub fn lmpdri(&self) -> LMPDRIR { let bits = ((self.bits >> 24) & 0xff) as u8; LMPDRIR { bits } } } impl W { #[doc = r"Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bits 0:7 - Log Sync Interval"] #[inline(always)] pub fn lsi(&mut self) -> _LSIW { _LSIW { w: self } } #[doc = "Bits 8:10 - Delay_Req to SYNC Ratio"] #[inline(always)] pub fn drsyncr(&mut self) -> _DRSYNCRW { _DRSYNCRW { w: self } } #[doc = "Bits 24:31 - Log Min Pdelay_Req Interval"] #[inline(always)] pub fn lmpdri(&mut self) -> _LMPDRIW { _LMPDRIW { w: self } } }