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#[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - DMA mode register"] pub dmamr: DMAMR, #[doc = "0x04 - System bus mode register"] pub dmasbmr: DMASBMR, #[doc = "0x08 - Interrupt status register"] pub dmaisr: DMAISR, #[doc = "0x0c - Debug status register"] pub dmadsr: DMADSR, _reserved4: [u8; 240usize], #[doc = "0x100 - Channel control register"] pub dmaccr: DMACCR, #[doc = "0x104 - Channel transmit control register"] pub dmactx_cr: DMACTXCR, #[doc = "0x108 - Channel receive control register"] pub dmacrx_cr: DMACRXCR, _reserved7: [u8; 8usize], #[doc = "0x114 - Channel Tx descriptor list address register"] pub dmactx_dlar: DMACTXDLAR, _reserved8: [u8; 4usize], #[doc = "0x11c - Channel Rx descriptor list address register"] pub dmacrx_dlar: DMACRXDLAR, #[doc = "0x120 - Channel Tx descriptor tail pointer register"] pub dmactx_dtpr: DMACTXDTPR, _reserved10: [u8; 4usize], #[doc = "0x128 - Channel Rx descriptor tail pointer register"] pub dmacrx_dtpr: DMACRXDTPR, #[doc = "0x12c - Channel Tx descriptor ring length register"] pub dmactx_rlr: DMACTXRLR, #[doc = "0x130 - Channel Rx descriptor ring length register"] pub dmacrx_rlr: DMACRXRLR, #[doc = "0x134 - Channel interrupt enable register"] pub dmacier: DMACIER, #[doc = "0x138 - Channel Rx interrupt watchdog timer register"] pub dmacrx_iwtr: DMACRXIWTR, _reserved15: [u8; 8usize], #[doc = "0x144 - Channel current application transmit descriptor register"] pub dmaccatx_dr: DMACCATXDR, _reserved16: [u8; 4usize], #[doc = "0x14c - Channel current application receive descriptor register"] pub dmaccarx_dr: DMACCARXDR, _reserved17: [u8; 4usize], #[doc = "0x154 - Channel current application transmit buffer register"] pub dmaccatx_br: DMACCATXBR, _reserved18: [u8; 4usize], #[doc = "0x15c - Channel current application receive buffer register"] pub dmaccarx_br: DMACCARXBR, #[doc = "0x160 - Channel status register"] pub dmacsr: DMACSR, _reserved20: [u8; 8usize], #[doc = "0x16c - Channel missed frame count register"] pub dmacmfcr: DMACMFCR, } #[doc = "DMA mode register"] pub struct DMAMR { register: vcell::VolatileCell<u32>, } #[doc = "DMA mode register"] pub mod dmamr; #[doc = "System bus mode register"] pub struct DMASBMR { register: vcell::VolatileCell<u32>, } #[doc = "System bus mode register"] pub mod dmasbmr; #[doc = "Interrupt status register"] pub struct DMAISR { register: vcell::VolatileCell<u32>, } #[doc = "Interrupt status register"] pub mod dmaisr; #[doc = "Debug status register"] pub struct DMADSR { register: vcell::VolatileCell<u32>, } #[doc = "Debug status register"] pub mod dmadsr; #[doc = "Channel control register"] pub struct DMACCR { register: vcell::VolatileCell<u32>, } #[doc = "Channel control register"] pub mod dmaccr; #[doc = "Channel transmit control register"] pub struct DMACTXCR { register: vcell::VolatileCell<u32>, } #[doc = "Channel transmit control register"] pub mod dmactx_cr; #[doc = "Channel receive control register"] pub struct DMACRXCR { register: vcell::VolatileCell<u32>, } #[doc = "Channel receive control register"] pub mod dmacrx_cr; #[doc = "Channel Tx descriptor list address register"] pub struct DMACTXDLAR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Tx descriptor list address register"] pub mod dmactx_dlar; #[doc = "Channel Rx descriptor list address register"] pub struct DMACRXDLAR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Rx descriptor list address register"] pub mod dmacrx_dlar; #[doc = "Channel Tx descriptor tail pointer register"] pub struct DMACTXDTPR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Tx descriptor tail pointer register"] pub mod dmactx_dtpr; #[doc = "Channel Rx descriptor tail pointer register"] pub struct DMACRXDTPR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Rx descriptor tail pointer register"] pub mod dmacrx_dtpr; #[doc = "Channel Tx descriptor ring length register"] pub struct DMACTXRLR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Tx descriptor ring length register"] pub mod dmactx_rlr; #[doc = "Channel Rx descriptor ring length register"] pub struct DMACRXRLR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Rx descriptor ring length register"] pub mod dmacrx_rlr; #[doc = "Channel interrupt enable register"] pub struct DMACIER { register: vcell::VolatileCell<u32>, } #[doc = "Channel interrupt enable register"] pub mod dmacier; #[doc = "Channel Rx interrupt watchdog timer register"] pub struct DMACRXIWTR { register: vcell::VolatileCell<u32>, } #[doc = "Channel Rx interrupt watchdog timer register"] pub mod dmacrx_iwtr; #[doc = "Channel current application transmit descriptor register"] pub struct DMACCATXDR { register: vcell::VolatileCell<u32>, } #[doc = "Channel current application transmit descriptor register"] pub mod dmaccatx_dr; #[doc = "Channel current application receive descriptor register"] pub struct DMACCARXDR { register: vcell::VolatileCell<u32>, } #[doc = "Channel current application receive descriptor register"] pub mod dmaccarx_dr; #[doc = "Channel current application transmit buffer register"] pub struct DMACCATXBR { register: vcell::VolatileCell<u32>, } #[doc = "Channel current application transmit buffer register"] pub mod dmaccatx_br; #[doc = "Channel current application receive buffer register"] pub struct DMACCARXBR { register: vcell::VolatileCell<u32>, } #[doc = "Channel current application receive buffer register"] pub mod dmaccarx_br; #[doc = "Channel status register"] pub struct DMACSR { register: vcell::VolatileCell<u32>, } #[doc = "Channel status register"] pub mod dmacsr; #[doc = "Channel missed frame count register"] pub struct DMACMFCR { register: vcell::VolatileCell<u32>, } #[doc = "Channel missed frame count register"] pub mod dmacmfcr;