#[doc = "Reader of register ISR"]
pub type R = crate::R<u32, super::ISR>;
#[doc = "Writer for register ISR"]
pub type W = crate::W<u32, super::ISR>;
#[doc = "Register ISR `reset()`'s with value 0x07"]
impl crate::ResetValue for super::ISR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0x07
}
}
#[doc = "Alarm A write flag This bit is set by hardware when Alarm A values can be changed, after the ALRAE bit has been set to 0 in RTC_CR. It is cleared by hardware in initialization mode.\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ALRAWF_A {
#[doc = "0: Alarm update not allowed"]
UPDATENOTALLOWED = 0,
#[doc = "1: Alarm update allowed"]
UPDATEALLOWED = 1,
}
impl From<ALRAWF_A> for bool {
#[inline(always)]
fn from(variant: ALRAWF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ALRAWF`"]
pub type ALRAWF_R = crate::R<bool, ALRAWF_A>;
impl ALRAWF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ALRAWF_A {
match self.bits {
false => ALRAWF_A::UPDATENOTALLOWED,
true => ALRAWF_A::UPDATEALLOWED,
}
}
#[doc = "Checks if the value of the field is `UPDATENOTALLOWED`"]
#[inline(always)]
pub fn is_update_not_allowed(&self) -> bool {
*self == ALRAWF_A::UPDATENOTALLOWED
}
#[doc = "Checks if the value of the field is `UPDATEALLOWED`"]
#[inline(always)]
pub fn is_update_allowed(&self) -> bool {
*self == ALRAWF_A::UPDATEALLOWED
}
}
#[doc = "Alarm B write flag This bit is set by hardware when Alarm B values can be changed, after the ALRBE bit has been set to 0 in RTC_CR. It is cleared by hardware in initialization mode."]
pub type ALRBWF_A = ALRAWF_A;
#[doc = "Reader of field `ALRBWF`"]
pub type ALRBWF_R = crate::R<bool, ALRAWF_A>;
#[doc = "Wakeup timer write flag This bit is set by hardware up to 2 RTCCLK cycles after the WUTE bit has been set to 0 in RTC_CR, and is cleared up to 2 RTCCLK cycles after the WUTE bit has been set to 1. The wakeup timer values can be changed when WUTE bit is cleared and WUTWF is set.\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUTWF_A {
#[doc = "0: Wakeup timer configuration update not allowed"]
UPDATENOTALLOWED = 0,
#[doc = "1: Wakeup timer configuration update allowed"]
UPDATEALLOWED = 1,
}
impl From<WUTWF_A> for bool {
#[inline(always)]
fn from(variant: WUTWF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `WUTWF`"]
pub type WUTWF_R = crate::R<bool, WUTWF_A>;
impl WUTWF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WUTWF_A {
match self.bits {
false => WUTWF_A::UPDATENOTALLOWED,
true => WUTWF_A::UPDATEALLOWED,
}
}
#[doc = "Checks if the value of the field is `UPDATENOTALLOWED`"]
#[inline(always)]
pub fn is_update_not_allowed(&self) -> bool {
*self == WUTWF_A::UPDATENOTALLOWED
}
#[doc = "Checks if the value of the field is `UPDATEALLOWED`"]
#[inline(always)]
pub fn is_update_allowed(&self) -> bool {
*self == WUTWF_A::UPDATEALLOWED
}
}
#[doc = "Shift operation pending This flag is set by hardware as soon as a shift operation is initiated by a write to the RTC_SHIFTR register. It is cleared by hardware when the corresponding shift operation has been executed. Writing to the SHPF bit has no effect.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SHPF_A {
#[doc = "0: No shift operation is pending"]
NOSHIFTPENDING = 0,
#[doc = "1: A shift operation is pending"]
SHIFTPENDING = 1,
}
impl From<SHPF_A> for bool {
#[inline(always)]
fn from(variant: SHPF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `SHPF`"]
pub type SHPF_R = crate::R<bool, SHPF_A>;
impl SHPF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SHPF_A {
match self.bits {
false => SHPF_A::NOSHIFTPENDING,
true => SHPF_A::SHIFTPENDING,
}
}
#[doc = "Checks if the value of the field is `NOSHIFTPENDING`"]
#[inline(always)]
pub fn is_no_shift_pending(&self) -> bool {
*self == SHPF_A::NOSHIFTPENDING
}
#[doc = "Checks if the value of the field is `SHIFTPENDING`"]
#[inline(always)]
pub fn is_shift_pending(&self) -> bool {
*self == SHPF_A::SHIFTPENDING
}
}
#[doc = "Initialization status flag This bit is set by hardware when the calendar year field is different from 0 (Backup domain reset state).\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum INITS_A {
#[doc = "0: Calendar has not been initialized"]
NOTINITALIZED = 0,
#[doc = "1: Calendar has been initialized"]
INITALIZED = 1,
}
impl From<INITS_A> for bool {
#[inline(always)]
fn from(variant: INITS_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `INITS`"]
pub type INITS_R = crate::R<bool, INITS_A>;
impl INITS_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> INITS_A {
match self.bits {
false => INITS_A::NOTINITALIZED,
true => INITS_A::INITALIZED,
}
}
#[doc = "Checks if the value of the field is `NOTINITALIZED`"]
#[inline(always)]
pub fn is_not_initalized(&self) -> bool {
*self == INITS_A::NOTINITALIZED
}
#[doc = "Checks if the value of the field is `INITALIZED`"]
#[inline(always)]
pub fn is_initalized(&self) -> bool {
*self == INITS_A::INITALIZED
}
}
#[doc = "Registers synchronization flag This bit is set by hardware each time the calendar registers are copied into the shadow registers (RTC_SSRx, RTC_TRx and RTC_DRx). This bit is cleared by hardware in initialization mode, while a shift operation is pending (SHPF=1), or when in bypass shadow register mode (BYPSHAD=1). This bit can also be cleared by software. It is cleared either by software or by hardware in initialization mode.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RSF_A {
#[doc = "0: Calendar shadow registers not yet synchronized"]
NOTSYNCED = 0,
#[doc = "1: Calendar shadow registers synchronized"]
SYNCED = 1,
}
impl From<RSF_A> for bool {
#[inline(always)]
fn from(variant: RSF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `RSF`"]
pub type RSF_R = crate::R<bool, RSF_A>;
impl RSF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RSF_A {
match self.bits {
false => RSF_A::NOTSYNCED,
true => RSF_A::SYNCED,
}
}
#[doc = "Checks if the value of the field is `NOTSYNCED`"]
#[inline(always)]
pub fn is_not_synced(&self) -> bool {
*self == RSF_A::NOTSYNCED
}
#[doc = "Checks if the value of the field is `SYNCED`"]
#[inline(always)]
pub fn is_synced(&self) -> bool {
*self == RSF_A::SYNCED
}
}
#[doc = "Registers synchronization flag This bit is set by hardware each time the calendar registers are copied into the shadow registers (RTC_SSRx, RTC_TRx and RTC_DRx). This bit is cleared by hardware in initialization mode, while a shift operation is pending (SHPF=1), or when in bypass shadow register mode (BYPSHAD=1). This bit can also be cleared by software. It is cleared either by software or by hardware in initialization mode.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RSF_AW {
#[doc = "0: This flag is cleared by software by writing 0"]
CLEAR = 0,
}
impl From<RSF_AW> for bool {
#[inline(always)]
fn from(variant: RSF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `RSF`"]
pub struct RSF_W<'a> {
w: &'a mut W,
}
impl<'a> RSF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: RSF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(RSF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Initialization flag When this bit is set to 1, the RTC is in initialization state, and the time, date and prescaler registers can be updated.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum INITF_A {
#[doc = "0: Calendar registers update is not allowed"]
NOTALLOWED = 0,
#[doc = "1: Calendar registers update is allowed"]
ALLOWED = 1,
}
impl From<INITF_A> for bool {
#[inline(always)]
fn from(variant: INITF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `INITF`"]
pub type INITF_R = crate::R<bool, INITF_A>;
impl INITF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> INITF_A {
match self.bits {
false => INITF_A::NOTALLOWED,
true => INITF_A::ALLOWED,
}
}
#[doc = "Checks if the value of the field is `NOTALLOWED`"]
#[inline(always)]
pub fn is_not_allowed(&self) -> bool {
*self == INITF_A::NOTALLOWED
}
#[doc = "Checks if the value of the field is `ALLOWED`"]
#[inline(always)]
pub fn is_allowed(&self) -> bool {
*self == INITF_A::ALLOWED
}
}
#[doc = "Initialization mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum INIT_A {
#[doc = "0: Free running mode"]
FREERUNNINGMODE = 0,
#[doc = "1: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset."]
INITMODE = 1,
}
impl From<INIT_A> for bool {
#[inline(always)]
fn from(variant: INIT_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `INIT`"]
pub type INIT_R = crate::R<bool, INIT_A>;
impl INIT_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> INIT_A {
match self.bits {
false => INIT_A::FREERUNNINGMODE,
true => INIT_A::INITMODE,
}
}
#[doc = "Checks if the value of the field is `FREERUNNINGMODE`"]
#[inline(always)]
pub fn is_free_running_mode(&self) -> bool {
*self == INIT_A::FREERUNNINGMODE
}
#[doc = "Checks if the value of the field is `INITMODE`"]
#[inline(always)]
pub fn is_init_mode(&self) -> bool {
*self == INIT_A::INITMODE
}
}
#[doc = "Write proxy for field `INIT`"]
pub struct INIT_W<'a> {
w: &'a mut W,
}
impl<'a> INIT_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: INIT_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Free running mode"]
#[inline(always)]
pub fn free_running_mode(self) -> &'a mut W {
self.variant(INIT_A::FREERUNNINGMODE)
}
#[doc = "Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset."]
#[inline(always)]
pub fn init_mode(self) -> &'a mut W {
self.variant(INIT_A::INITMODE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "Alarm A flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR). This flag is cleared by software by writing 0.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ALRAF_A {
#[doc = "1: This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR)"]
MATCH = 1,
}
impl From<ALRAF_A> for bool {
#[inline(always)]
fn from(variant: ALRAF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ALRAF`"]
pub type ALRAF_R = crate::R<bool, ALRAF_A>;
impl ALRAF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, ALRAF_A> {
use crate::Variant::*;
match self.bits {
true => Val(ALRAF_A::MATCH),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `MATCH`"]
#[inline(always)]
pub fn is_match_(&self) -> bool {
*self == ALRAF_A::MATCH
}
}
#[doc = "Alarm A flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR). This flag is cleared by software by writing 0.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ALRAF_AW {
#[doc = "0: This flag is cleared by software by writing 0"]
CLEAR = 0,
}
impl From<ALRAF_AW> for bool {
#[inline(always)]
fn from(variant: ALRAF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `ALRAF`"]
pub struct ALRAF_W<'a> {
w: &'a mut W,
}
impl<'a> ALRAF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ALRAF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(ALRAF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Alarm B flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR). This flag is cleared by software by writing 0.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ALRBF_A {
#[doc = "1: This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR)"]
MATCH = 1,
}
impl From<ALRBF_A> for bool {
#[inline(always)]
fn from(variant: ALRBF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ALRBF`"]
pub type ALRBF_R = crate::R<bool, ALRBF_A>;
impl ALRBF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, ALRBF_A> {
use crate::Variant::*;
match self.bits {
true => Val(ALRBF_A::MATCH),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `MATCH`"]
#[inline(always)]
pub fn is_match_(&self) -> bool {
*self == ALRBF_A::MATCH
}
}
#[doc = "Alarm B flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR). This flag is cleared by software by writing 0.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ALRBF_AW {
#[doc = "0: This flag is cleared by software by writing 0"]
CLEAR = 0,
}
impl From<ALRBF_AW> for bool {
#[inline(always)]
fn from(variant: ALRBF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `ALRBF`"]
pub struct ALRBF_W<'a> {
w: &'a mut W,
}
impl<'a> ALRBF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ALRBF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(ALRBF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "Wakeup timer flag This flag is set by hardware when the wakeup auto-reload counter reaches 0. This flag is cleared by software by writing 0. This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1 again.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUTF_A {
#[doc = "1: This flag is set by hardware when the wakeup auto-reload counter reaches 0"]
ZERO = 1,
}
impl From<WUTF_A> for bool {
#[inline(always)]
fn from(variant: WUTF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `WUTF`"]
pub type WUTF_R = crate::R<bool, WUTF_A>;
impl WUTF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, WUTF_A> {
use crate::Variant::*;
match self.bits {
true => Val(WUTF_A::ZERO),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `ZERO`"]
#[inline(always)]
pub fn is_zero(&self) -> bool {
*self == WUTF_A::ZERO
}
}
#[doc = "Wakeup timer flag This flag is set by hardware when the wakeup auto-reload counter reaches 0. This flag is cleared by software by writing 0. This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1 again.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUTF_AW {
#[doc = "0: This flag is cleared by software by writing 0"]
CLEAR = 0,
}
impl From<WUTF_AW> for bool {
#[inline(always)]
fn from(variant: WUTF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `WUTF`"]
pub struct WUTF_W<'a> {
w: &'a mut W,
}
impl<'a> WUTF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WUTF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(WUTF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "Time-stamp flag This flag is set by hardware when a time-stamp event occurs. This flag is cleared by software by writing 0.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TSF_A {
#[doc = "1: This flag is set by hardware when a time-stamp event occurs"]
TIMESTAMPEVENT = 1,
}
impl From<TSF_A> for bool {
#[inline(always)]
fn from(variant: TSF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `TSF`"]
pub type TSF_R = crate::R<bool, TSF_A>;
impl TSF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, TSF_A> {
use crate::Variant::*;
match self.bits {
true => Val(TSF_A::TIMESTAMPEVENT),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `TIMESTAMPEVENT`"]
#[inline(always)]
pub fn is_timestamp_event(&self) -> bool {
*self == TSF_A::TIMESTAMPEVENT
}
}
#[doc = "Time-stamp flag This flag is set by hardware when a time-stamp event occurs. This flag is cleared by software by writing 0.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TSF_AW {
#[doc = "0: This flag is cleared by software by writing 0"]
CLEAR = 0,
}
impl From<TSF_AW> for bool {
#[inline(always)]
fn from(variant: TSF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `TSF`"]
pub struct TSF_W<'a> {
w: &'a mut W,
}
impl<'a> TSF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TSF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(TSF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "Time-stamp overflow flag This flag is set by hardware when a time-stamp event occurs while TSF is already set. This flag is cleared by software by writing 0. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a time-stamp event occurs immediately before the TSF bit is cleared.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TSOVF_A {
#[doc = "1: This flag is set by hardware when a time-stamp event occurs while TSF is already set"]
OVERFLOW = 1,
}
impl From<TSOVF_A> for bool {
#[inline(always)]
fn from(variant: TSOVF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `TSOVF`"]
pub type TSOVF_R = crate::R<bool, TSOVF_A>;
impl TSOVF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, TSOVF_A> {
use crate::Variant::*;
match self.bits {
true => Val(TSOVF_A::OVERFLOW),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `OVERFLOW`"]
#[inline(always)]
pub fn is_overflow(&self) -> bool {
*self == TSOVF_A::OVERFLOW
}
}
#[doc = "Time-stamp overflow flag This flag is set by hardware when a time-stamp event occurs while TSF is already set. This flag is cleared by software by writing 0. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a time-stamp event occurs immediately before the TSF bit is cleared.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TSOVF_AW {
#[doc = "0: This flag is cleared by software by writing 0"]
CLEAR = 0,
}
impl From<TSOVF_AW> for bool {
#[inline(always)]
fn from(variant: TSOVF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `TSOVF`"]
pub struct TSOVF_W<'a> {
w: &'a mut W,
}
impl<'a> TSOVF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TSOVF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(TSOVF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "RTC_TAMP1 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP1 input. It is cleared by software writing 0\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TAMP1F_A {
#[doc = "1: This flag is set by hardware when a tamper detection event is detected on the RTC_TAMPx input"]
TAMPERED = 1,
}
impl From<TAMP1F_A> for bool {
#[inline(always)]
fn from(variant: TAMP1F_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `TAMP1F`"]
pub type TAMP1F_R = crate::R<bool, TAMP1F_A>;
impl TAMP1F_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, TAMP1F_A> {
use crate::Variant::*;
match self.bits {
true => Val(TAMP1F_A::TAMPERED),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `TAMPERED`"]
#[inline(always)]
pub fn is_tampered(&self) -> bool {
*self == TAMP1F_A::TAMPERED
}
}
#[doc = "RTC_TAMP1 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP1 input. It is cleared by software writing 0\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TAMP1F_AW {
#[doc = "0: Flag cleared by software writing 0"]
CLEAR = 0,
}
impl From<TAMP1F_AW> for bool {
#[inline(always)]
fn from(variant: TAMP1F_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `TAMP1F`"]
pub struct TAMP1F_W<'a> {
w: &'a mut W,
}
impl<'a> TAMP1F_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TAMP1F_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Flag cleared by software writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(TAMP1F_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
self.w
}
}
#[doc = "RTC_TAMP2 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP2 input. It is cleared by software writing 0"]
pub type TAMP2F_A = TAMP1F_A;
#[doc = "Reader of field `TAMP2F`"]
pub type TAMP2F_R = crate::R<bool, TAMP1F_A>;
#[doc = "RTC_TAMP2 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP2 input. It is cleared by software writing 0"]
pub type TAMP2F_AW = TAMP1F_AW;
#[doc = "Write proxy for field `TAMP2F`"]
pub struct TAMP2F_W<'a> {
w: &'a mut W,
}
impl<'a> TAMP2F_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TAMP2F_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Flag cleared by software writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(TAMP1F_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "RTC_TAMP3 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP3 input. It is cleared by software writing 0"]
pub type TAMP3F_A = TAMP1F_A;
#[doc = "Reader of field `TAMP3F`"]
pub type TAMP3F_R = crate::R<bool, TAMP1F_A>;
#[doc = "RTC_TAMP3 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP3 input. It is cleared by software writing 0"]
pub type TAMP3F_AW = TAMP1F_AW;
#[doc = "Write proxy for field `TAMP3F`"]
pub struct TAMP3F_W<'a> {
w: &'a mut W,
}
impl<'a> TAMP3F_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TAMP3F_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Flag cleared by software writing 0"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(TAMP1F_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "Recalibration pending Flag The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0. Refer to Re-calibration on-the-fly.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RECALPF_A {
#[doc = "1: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0"]
PENDING = 1,
}
impl From<RECALPF_A> for bool {
#[inline(always)]
fn from(variant: RECALPF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `RECALPF`"]
pub type RECALPF_R = crate::R<bool, RECALPF_A>;
impl RECALPF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, RECALPF_A> {
use crate::Variant::*;
match self.bits {
true => Val(RECALPF_A::PENDING),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `PENDING`"]
#[inline(always)]
pub fn is_pending(&self) -> bool {
*self == RECALPF_A::PENDING
}
}
#[doc = "Internal tTime-stamp flag\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ITSF_A {
#[doc = "1: This flag is set by hardware when a time-stamp on the internal event occurs"]
MATCH = 1,
}
impl From<ITSF_A> for bool {
#[inline(always)]
fn from(variant: ITSF_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `ITSF`"]
pub type ITSF_R = crate::R<bool, ITSF_A>;
impl ITSF_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, ITSF_A> {
use crate::Variant::*;
match self.bits {
true => Val(ITSF_A::MATCH),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `MATCH`"]
#[inline(always)]
pub fn is_match_(&self) -> bool {
*self == ITSF_A::MATCH
}
}
#[doc = "Internal tTime-stamp flag\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ITSF_AW {
#[doc = "0: This flag is cleared by software by writing 0, and must be cleared together with TSF bit by writing 0 in both bits"]
CLEAR = 0,
}
impl From<ITSF_AW> for bool {
#[inline(always)]
fn from(variant: ITSF_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `ITSF`"]
pub struct ITSF_W<'a> {
w: &'a mut W,
}
impl<'a> ITSF_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ITSF_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "This flag is cleared by software by writing 0, and must be cleared together with TSF bit by writing 0 in both bits"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(ITSF_AW::CLEAR)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
self.w
}
}
impl R {
#[doc = "Bit 0 - Alarm A write flag This bit is set by hardware when Alarm A values can be changed, after the ALRAE bit has been set to 0 in RTC_CR. It is cleared by hardware in initialization mode."]
#[inline(always)]
pub fn alrawf(&self) -> ALRAWF_R {
ALRAWF_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - Alarm B write flag This bit is set by hardware when Alarm B values can be changed, after the ALRBE bit has been set to 0 in RTC_CR. It is cleared by hardware in initialization mode."]
#[inline(always)]
pub fn alrbwf(&self) -> ALRBWF_R {
ALRBWF_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - Wakeup timer write flag This bit is set by hardware up to 2 RTCCLK cycles after the WUTE bit has been set to 0 in RTC_CR, and is cleared up to 2 RTCCLK cycles after the WUTE bit has been set to 1. The wakeup timer values can be changed when WUTE bit is cleared and WUTWF is set."]
#[inline(always)]
pub fn wutwf(&self) -> WUTWF_R {
WUTWF_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - Shift operation pending This flag is set by hardware as soon as a shift operation is initiated by a write to the RTC_SHIFTR register. It is cleared by hardware when the corresponding shift operation has been executed. Writing to the SHPF bit has no effect."]
#[inline(always)]
pub fn shpf(&self) -> SHPF_R {
SHPF_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - Initialization status flag This bit is set by hardware when the calendar year field is different from 0 (Backup domain reset state)."]
#[inline(always)]
pub fn inits(&self) -> INITS_R {
INITS_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - Registers synchronization flag This bit is set by hardware each time the calendar registers are copied into the shadow registers (RTC_SSRx, RTC_TRx and RTC_DRx). This bit is cleared by hardware in initialization mode, while a shift operation is pending (SHPF=1), or when in bypass shadow register mode (BYPSHAD=1). This bit can also be cleared by software. It is cleared either by software or by hardware in initialization mode."]
#[inline(always)]
pub fn rsf(&self) -> RSF_R {
RSF_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 6 - Initialization flag When this bit is set to 1, the RTC is in initialization state, and the time, date and prescaler registers can be updated."]
#[inline(always)]
pub fn initf(&self) -> INITF_R {
INITF_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 7 - Initialization mode"]
#[inline(always)]
pub fn init(&self) -> INIT_R {
INIT_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - Alarm A flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR). This flag is cleared by software by writing 0."]
#[inline(always)]
pub fn alraf(&self) -> ALRAF_R {
ALRAF_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - Alarm B flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR). This flag is cleared by software by writing 0."]
#[inline(always)]
pub fn alrbf(&self) -> ALRBF_R {
ALRBF_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - Wakeup timer flag This flag is set by hardware when the wakeup auto-reload counter reaches 0. This flag is cleared by software by writing 0. This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1 again."]
#[inline(always)]
pub fn wutf(&self) -> WUTF_R {
WUTF_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 11 - Time-stamp flag This flag is set by hardware when a time-stamp event occurs. This flag is cleared by software by writing 0."]
#[inline(always)]
pub fn tsf(&self) -> TSF_R {
TSF_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 12 - Time-stamp overflow flag This flag is set by hardware when a time-stamp event occurs while TSF is already set. This flag is cleared by software by writing 0. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a time-stamp event occurs immediately before the TSF bit is cleared."]
#[inline(always)]
pub fn tsovf(&self) -> TSOVF_R {
TSOVF_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 13 - RTC_TAMP1 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP1 input. It is cleared by software writing 0"]
#[inline(always)]
pub fn tamp1f(&self) -> TAMP1F_R {
TAMP1F_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 14 - RTC_TAMP2 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP2 input. It is cleared by software writing 0"]
#[inline(always)]
pub fn tamp2f(&self) -> TAMP2F_R {
TAMP2F_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - RTC_TAMP3 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP3 input. It is cleared by software writing 0"]
#[inline(always)]
pub fn tamp3f(&self) -> TAMP3F_R {
TAMP3F_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - Recalibration pending Flag The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0. Refer to Re-calibration on-the-fly."]
#[inline(always)]
pub fn recalpf(&self) -> RECALPF_R {
RECALPF_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - Internal tTime-stamp flag"]
#[inline(always)]
pub fn itsf(&self) -> ITSF_R {
ITSF_R::new(((self.bits >> 17) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 5 - Registers synchronization flag This bit is set by hardware each time the calendar registers are copied into the shadow registers (RTC_SSRx, RTC_TRx and RTC_DRx). This bit is cleared by hardware in initialization mode, while a shift operation is pending (SHPF=1), or when in bypass shadow register mode (BYPSHAD=1). This bit can also be cleared by software. It is cleared either by software or by hardware in initialization mode."]
#[inline(always)]
pub fn rsf(&mut self) -> RSF_W {
RSF_W { w: self }
}
#[doc = "Bit 7 - Initialization mode"]
#[inline(always)]
pub fn init(&mut self) -> INIT_W {
INIT_W { w: self }
}
#[doc = "Bit 8 - Alarm A flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR). This flag is cleared by software by writing 0."]
#[inline(always)]
pub fn alraf(&mut self) -> ALRAF_W {
ALRAF_W { w: self }
}
#[doc = "Bit 9 - Alarm B flag This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR). This flag is cleared by software by writing 0."]
#[inline(always)]
pub fn alrbf(&mut self) -> ALRBF_W {
ALRBF_W { w: self }
}
#[doc = "Bit 10 - Wakeup timer flag This flag is set by hardware when the wakeup auto-reload counter reaches 0. This flag is cleared by software by writing 0. This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1 again."]
#[inline(always)]
pub fn wutf(&mut self) -> WUTF_W {
WUTF_W { w: self }
}
#[doc = "Bit 11 - Time-stamp flag This flag is set by hardware when a time-stamp event occurs. This flag is cleared by software by writing 0."]
#[inline(always)]
pub fn tsf(&mut self) -> TSF_W {
TSF_W { w: self }
}
#[doc = "Bit 12 - Time-stamp overflow flag This flag is set by hardware when a time-stamp event occurs while TSF is already set. This flag is cleared by software by writing 0. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a time-stamp event occurs immediately before the TSF bit is cleared."]
#[inline(always)]
pub fn tsovf(&mut self) -> TSOVF_W {
TSOVF_W { w: self }
}
#[doc = "Bit 13 - RTC_TAMP1 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP1 input. It is cleared by software writing 0"]
#[inline(always)]
pub fn tamp1f(&mut self) -> TAMP1F_W {
TAMP1F_W { w: self }
}
#[doc = "Bit 14 - RTC_TAMP2 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP2 input. It is cleared by software writing 0"]
#[inline(always)]
pub fn tamp2f(&mut self) -> TAMP2F_W {
TAMP2F_W { w: self }
}
#[doc = "Bit 15 - RTC_TAMP3 detection flag This flag is set by hardware when a tamper detection event is detected on the RTC_TAMP3 input. It is cleared by software writing 0"]
#[inline(always)]
pub fn tamp3f(&mut self) -> TAMP3F_W {
TAMP3F_W { w: self }
}
#[doc = "Bit 17 - Internal tTime-stamp flag"]
#[inline(always)]
pub fn itsf(&mut self) -> ITSF_W {
ITSF_W { w: self }
}
}