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#[doc = "Reader of register C1_APB3ENR"] pub type R = crate::R<u32, super::C1_APB3ENR>; #[doc = "Writer for register C1_APB3ENR"] pub type W = crate::W<u32, super::C1_APB3ENR>; #[doc = "Register C1_APB3ENR `reset()`'s with value 0"] impl crate::ResetValue for super::C1_APB3ENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "LTDC peripheral clock enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum LTDCEN_A { #[doc = "0: The selected clock is disabled"] DISABLED = 0, #[doc = "1: The selected clock is enabled"] ENABLED = 1, } impl From<LTDCEN_A> for bool { #[inline(always)] fn from(variant: LTDCEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `LTDCEN`"] pub type LTDCEN_R = crate::R<bool, LTDCEN_A>; impl LTDCEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> LTDCEN_A { match self.bits { false => LTDCEN_A::DISABLED, true => LTDCEN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == LTDCEN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == LTDCEN_A::ENABLED } } #[doc = "Write proxy for field `LTDCEN`"] pub struct LTDCEN_W<'a> { w: &'a mut W, } impl<'a> LTDCEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LTDCEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(LTDCEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(LTDCEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "WWDG1 Clock Enable"] pub type WWDG1EN_A = LTDCEN_A; #[doc = "Reader of field `WWDG1EN`"] pub type WWDG1EN_R = crate::R<bool, LTDCEN_A>; #[doc = "Write proxy for field `WWDG1EN`"] pub struct WWDG1EN_W<'a> { w: &'a mut W, } impl<'a> WWDG1EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: WWDG1EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(LTDCEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(LTDCEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } impl R { #[doc = "Bit 3 - LTDC peripheral clock enable"] #[inline(always)] pub fn ltdcen(&self) -> LTDCEN_R { LTDCEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 6 - WWDG1 Clock Enable"] #[inline(always)] pub fn wwdg1en(&self) -> WWDG1EN_R { WWDG1EN_R::new(((self.bits >> 6) & 0x01) != 0) } } impl W { #[doc = "Bit 3 - LTDC peripheral clock enable"] #[inline(always)] pub fn ltdcen(&mut self) -> LTDCEN_W { LTDCEN_W { w: self } } #[doc = "Bit 6 - WWDG1 Clock Enable"] #[inline(always)] pub fn wwdg1en(&mut self) -> WWDG1EN_W { WWDG1EN_W { w: self } } }