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#[doc = "Reader of register APB4RSTR"] pub type R = crate::R<u32, super::APB4RSTR>; #[doc = "Writer for register APB4RSTR"] pub type W = crate::W<u32, super::APB4RSTR>; #[doc = "Register APB4RSTR `reset()`'s with value 0"] impl crate::ResetValue for super::APB4RSTR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "SYSCFG block reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum SYSCFGRST_A { #[doc = "1: Reset the selected module"] RESET = 1, } impl From<SYSCFGRST_A> for bool { #[inline(always)] fn from(variant: SYSCFGRST_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `SYSCFGRST`"] pub type SYSCFGRST_R = crate::R<bool, SYSCFGRST_A>; impl SYSCFGRST_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<bool, SYSCFGRST_A> { use crate::Variant::*; match self.bits { true => Val(SYSCFGRST_A::RESET), i => Res(i), } } #[doc = "Checks if the value of the field is `RESET`"] #[inline(always)] pub fn is_reset(&self) -> bool { *self == SYSCFGRST_A::RESET } } #[doc = "Write proxy for field `SYSCFGRST`"] pub struct SYSCFGRST_W<'a> { w: &'a mut W, } impl<'a> SYSCFGRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SYSCFGRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "LPUART1 block reset"] pub type LPUART1RST_A = SYSCFGRST_A; #[doc = "Reader of field `LPUART1RST`"] pub type LPUART1RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `LPUART1RST`"] pub struct LPUART1RST_W<'a> { w: &'a mut W, } impl<'a> LPUART1RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LPUART1RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "SPI6 block reset"] pub type SPI6RST_A = SYSCFGRST_A; #[doc = "Reader of field `SPI6RST`"] pub type SPI6RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `SPI6RST`"] pub struct SPI6RST_W<'a> { w: &'a mut W, } impl<'a> SPI6RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SPI6RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "I2C4 block reset"] pub type I2C4RST_A = SYSCFGRST_A; #[doc = "Reader of field `I2C4RST`"] pub type I2C4RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `I2C4RST`"] pub struct I2C4RST_W<'a> { w: &'a mut W, } impl<'a> I2C4RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: I2C4RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "LPTIM2 block reset"] pub type LPTIM2RST_A = SYSCFGRST_A; #[doc = "Reader of field `LPTIM2RST`"] pub type LPTIM2RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `LPTIM2RST`"] pub struct LPTIM2RST_W<'a> { w: &'a mut W, } impl<'a> LPTIM2RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LPTIM2RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "LPTIM3 block reset"] pub type LPTIM3RST_A = SYSCFGRST_A; #[doc = "Reader of field `LPTIM3RST`"] pub type LPTIM3RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `LPTIM3RST`"] pub struct LPTIM3RST_W<'a> { w: &'a mut W, } impl<'a> LPTIM3RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LPTIM3RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "LPTIM4 block reset"] pub type LPTIM4RST_A = SYSCFGRST_A; #[doc = "Reader of field `LPTIM4RST`"] pub type LPTIM4RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `LPTIM4RST`"] pub struct LPTIM4RST_W<'a> { w: &'a mut W, } impl<'a> LPTIM4RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LPTIM4RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "LPTIM5 block reset"] pub type LPTIM5RST_A = SYSCFGRST_A; #[doc = "Reader of field `LPTIM5RST`"] pub type LPTIM5RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `LPTIM5RST`"] pub struct LPTIM5RST_W<'a> { w: &'a mut W, } impl<'a> LPTIM5RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LPTIM5RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "COMP12 Blocks Reset"] pub type COMP12RST_A = SYSCFGRST_A; #[doc = "Reader of field `COMP12RST`"] pub type COMP12RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `COMP12RST`"] pub struct COMP12RST_W<'a> { w: &'a mut W, } impl<'a> COMP12RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: COMP12RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "VREF block reset"] pub type VREFRST_A = SYSCFGRST_A; #[doc = "Reader of field `VREFRST`"] pub type VREFRST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `VREFRST`"] pub struct VREFRST_W<'a> { w: &'a mut W, } impl<'a> VREFRST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: VREFRST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "SAI4 block reset"] pub type SAI4RST_A = SYSCFGRST_A; #[doc = "Reader of field `SAI4RST`"] pub type SAI4RST_R = crate::R<bool, SYSCFGRST_A>; #[doc = "Write proxy for field `SAI4RST`"] pub struct SAI4RST_W<'a> { w: &'a mut W, } impl<'a> SAI4RST_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SAI4RST_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Reset the selected module"] #[inline(always)] pub fn reset(self) -> &'a mut W { self.variant(SYSCFGRST_A::RESET) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } impl R { #[doc = "Bit 1 - SYSCFG block reset"] #[inline(always)] pub fn syscfgrst(&self) -> SYSCFGRST_R { SYSCFGRST_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - LPUART1 block reset"] #[inline(always)] pub fn lpuart1rst(&self) -> LPUART1RST_R { LPUART1RST_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 5 - SPI6 block reset"] #[inline(always)] pub fn spi6rst(&self) -> SPI6RST_R { SPI6RST_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - I2C4 block reset"] #[inline(always)] pub fn i2c4rst(&self) -> I2C4RST_R { I2C4RST_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 9 - LPTIM2 block reset"] #[inline(always)] pub fn lptim2rst(&self) -> LPTIM2RST_R { LPTIM2RST_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - LPTIM3 block reset"] #[inline(always)] pub fn lptim3rst(&self) -> LPTIM3RST_R { LPTIM3RST_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - LPTIM4 block reset"] #[inline(always)] pub fn lptim4rst(&self) -> LPTIM4RST_R { LPTIM4RST_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - LPTIM5 block reset"] #[inline(always)] pub fn lptim5rst(&self) -> LPTIM5RST_R { LPTIM5RST_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 14 - COMP12 Blocks Reset"] #[inline(always)] pub fn comp12rst(&self) -> COMP12RST_R { COMP12RST_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - VREF block reset"] #[inline(always)] pub fn vrefrst(&self) -> VREFRST_R { VREFRST_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 21 - SAI4 block reset"] #[inline(always)] pub fn sai4rst(&self) -> SAI4RST_R { SAI4RST_R::new(((self.bits >> 21) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - SYSCFG block reset"] #[inline(always)] pub fn syscfgrst(&mut self) -> SYSCFGRST_W { SYSCFGRST_W { w: self } } #[doc = "Bit 3 - LPUART1 block reset"] #[inline(always)] pub fn lpuart1rst(&mut self) -> LPUART1RST_W { LPUART1RST_W { w: self } } #[doc = "Bit 5 - SPI6 block reset"] #[inline(always)] pub fn spi6rst(&mut self) -> SPI6RST_W { SPI6RST_W { w: self } } #[doc = "Bit 7 - I2C4 block reset"] #[inline(always)] pub fn i2c4rst(&mut self) -> I2C4RST_W { I2C4RST_W { w: self } } #[doc = "Bit 9 - LPTIM2 block reset"] #[inline(always)] pub fn lptim2rst(&mut self) -> LPTIM2RST_W { LPTIM2RST_W { w: self } } #[doc = "Bit 10 - LPTIM3 block reset"] #[inline(always)] pub fn lptim3rst(&mut self) -> LPTIM3RST_W { LPTIM3RST_W { w: self } } #[doc = "Bit 11 - LPTIM4 block reset"] #[inline(always)] pub fn lptim4rst(&mut self) -> LPTIM4RST_W { LPTIM4RST_W { w: self } } #[doc = "Bit 12 - LPTIM5 block reset"] #[inline(always)] pub fn lptim5rst(&mut self) -> LPTIM5RST_W { LPTIM5RST_W { w: self } } #[doc = "Bit 14 - COMP12 Blocks Reset"] #[inline(always)] pub fn comp12rst(&mut self) -> COMP12RST_W { COMP12RST_W { w: self } } #[doc = "Bit 15 - VREF block reset"] #[inline(always)] pub fn vrefrst(&mut self) -> VREFRST_W { VREFRST_W { w: self } } #[doc = "Bit 21 - SAI4 block reset"] #[inline(always)] pub fn sai4rst(&mut self) -> SAI4RST_W { SAI4RST_W { w: self } } }