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#[doc = "Reader of register AHB3ENR"] pub type R = crate::R<u32, super::AHB3ENR>; #[doc = "Writer for register AHB3ENR"] pub type W = crate::W<u32, super::AHB3ENR>; #[doc = "Register AHB3ENR `reset()`'s with value 0"] impl crate::ResetValue for super::AHB3ENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "MDMA Peripheral Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MDMAEN_A { #[doc = "0: The selected clock is disabled"] DISABLED = 0, #[doc = "1: The selected clock is enabled"] ENABLED = 1, } impl From<MDMAEN_A> for bool { #[inline(always)] fn from(variant: MDMAEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `MDMAEN`"] pub type MDMAEN_R = crate::R<bool, MDMAEN_A>; impl MDMAEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> MDMAEN_A { match self.bits { false => MDMAEN_A::DISABLED, true => MDMAEN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == MDMAEN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == MDMAEN_A::ENABLED } } #[doc = "Write proxy for field `MDMAEN`"] pub struct MDMAEN_W<'a> { w: &'a mut W, } impl<'a> MDMAEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: MDMAEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MDMAEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MDMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "DMA2D Peripheral Clock Enable"] pub type DMA2DEN_A = MDMAEN_A; #[doc = "Reader of field `DMA2DEN`"] pub type DMA2DEN_R = crate::R<bool, MDMAEN_A>; #[doc = "Write proxy for field `DMA2DEN`"] pub struct DMA2DEN_W<'a> { w: &'a mut W, } impl<'a> DMA2DEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: DMA2DEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MDMAEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MDMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "JPGDEC Peripheral Clock Enable"] pub type JPGDECEN_A = MDMAEN_A; #[doc = "Reader of field `JPGDECEN`"] pub type JPGDECEN_R = crate::R<bool, MDMAEN_A>; #[doc = "Write proxy for field `JPGDECEN`"] pub struct JPGDECEN_W<'a> { w: &'a mut W, } impl<'a> JPGDECEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: JPGDECEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MDMAEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MDMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "FMC Peripheral Clocks Enable"] pub type FMCEN_A = MDMAEN_A; #[doc = "Reader of field `FMCEN`"] pub type FMCEN_R = crate::R<bool, MDMAEN_A>; #[doc = "Write proxy for field `FMCEN`"] pub struct FMCEN_W<'a> { w: &'a mut W, } impl<'a> FMCEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: FMCEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MDMAEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MDMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "QUADSPI and QUADSPI Delay Clock Enable"] pub type QSPIEN_A = MDMAEN_A; #[doc = "Reader of field `QSPIEN`"] pub type QSPIEN_R = crate::R<bool, MDMAEN_A>; #[doc = "Write proxy for field `QSPIEN`"] pub struct QSPIEN_W<'a> { w: &'a mut W, } impl<'a> QSPIEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: QSPIEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MDMAEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MDMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "SDMMC1 and SDMMC1 Delay Clock Enable"] pub type SDMMC1EN_A = MDMAEN_A; #[doc = "Reader of field `SDMMC1EN`"] pub type SDMMC1EN_R = crate::R<bool, MDMAEN_A>; #[doc = "Write proxy for field `SDMMC1EN`"] pub struct SDMMC1EN_W<'a> { w: &'a mut W, } impl<'a> SDMMC1EN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SDMMC1EN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(MDMAEN_A::DISABLED) } #[doc = "The selected clock is enabled"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(MDMAEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } impl R { #[doc = "Bit 0 - MDMA Peripheral Clock Enable"] #[inline(always)] pub fn mdmaen(&self) -> MDMAEN_R { MDMAEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 4 - DMA2D Peripheral Clock Enable"] #[inline(always)] pub fn dma2den(&self) -> DMA2DEN_R { DMA2DEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - JPGDEC Peripheral Clock Enable"] #[inline(always)] pub fn jpgdecen(&self) -> JPGDECEN_R { JPGDECEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 12 - FMC Peripheral Clocks Enable"] #[inline(always)] pub fn fmcen(&self) -> FMCEN_R { FMCEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 14 - QUADSPI and QUADSPI Delay Clock Enable"] #[inline(always)] pub fn qspien(&self) -> QSPIEN_R { QSPIEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 16 - SDMMC1 and SDMMC1 Delay Clock Enable"] #[inline(always)] pub fn sdmmc1en(&self) -> SDMMC1EN_R { SDMMC1EN_R::new(((self.bits >> 16) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - MDMA Peripheral Clock Enable"] #[inline(always)] pub fn mdmaen(&mut self) -> MDMAEN_W { MDMAEN_W { w: self } } #[doc = "Bit 4 - DMA2D Peripheral Clock Enable"] #[inline(always)] pub fn dma2den(&mut self) -> DMA2DEN_W { DMA2DEN_W { w: self } } #[doc = "Bit 5 - JPGDEC Peripheral Clock Enable"] #[inline(always)] pub fn jpgdecen(&mut self) -> JPGDECEN_W { JPGDECEN_W { w: self } } #[doc = "Bit 12 - FMC Peripheral Clocks Enable"] #[inline(always)] pub fn fmcen(&mut self) -> FMCEN_W { FMCEN_W { w: self } } #[doc = "Bit 14 - QUADSPI and QUADSPI Delay Clock Enable"] #[inline(always)] pub fn qspien(&mut self) -> QSPIEN_W { QSPIEN_W { w: self } } #[doc = "Bit 16 - SDMMC1 and SDMMC1 Delay Clock Enable"] #[inline(always)] pub fn sdmmc1en(&mut self) -> SDMMC1EN_W { SDMMC1EN_W { w: self } } }