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#[doc = "Reader of register AHB2LPENR"] pub type R = crate::R<u32, super::AHB2LPENR>; #[doc = "Writer for register AHB2LPENR"] pub type W = crate::W<u32, super::AHB2LPENR>; #[doc = "Register AHB2LPENR `reset()`'s with value 0"] impl crate::ResetValue for super::AHB2LPENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "DCMI peripheral clock enable during csleep mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum DCMILPEN_A { #[doc = "0: The selected clock is disabled during csleep mode"] DISABLED = 0, #[doc = "1: The selected clock is enabled during csleep mode"] ENABLED = 1, } impl From<DCMILPEN_A> for bool { #[inline(always)] fn from(variant: DCMILPEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `DCMILPEN`"] pub type DCMILPEN_R = crate::R<bool, DCMILPEN_A>; impl DCMILPEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> DCMILPEN_A { match self.bits { false => DCMILPEN_A::DISABLED, true => DCMILPEN_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == DCMILPEN_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == DCMILPEN_A::ENABLED } } #[doc = "Write proxy for field `DCMILPEN`"] pub struct DCMILPEN_W<'a> { w: &'a mut W, } impl<'a> DCMILPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: DCMILPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "CRYPT peripheral clock enable during CSleep mode"] pub type CRYPTLPEN_A = DCMILPEN_A; #[doc = "Reader of field `CRYPTLPEN`"] pub type CRYPTLPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `CRYPTLPEN`"] pub struct CRYPTLPEN_W<'a> { w: &'a mut W, } impl<'a> CRYPTLPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CRYPTLPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "HASH peripheral clock enable during CSleep mode"] pub type HASHLPEN_A = DCMILPEN_A; #[doc = "Reader of field `HASHLPEN`"] pub type HASHLPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `HASHLPEN`"] pub struct HASHLPEN_W<'a> { w: &'a mut W, } impl<'a> HASHLPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: HASHLPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] pub type SDMMC2LPEN_A = DCMILPEN_A; #[doc = "Reader of field `SDMMC2LPEN`"] pub type SDMMC2LPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `SDMMC2LPEN`"] pub struct SDMMC2LPEN_W<'a> { w: &'a mut W, } impl<'a> SDMMC2LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SDMMC2LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "RNG peripheral clock enable during CSleep mode"] pub type RNGLPEN_A = DCMILPEN_A; #[doc = "Reader of field `RNGLPEN`"] pub type RNGLPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `RNGLPEN`"] pub struct RNGLPEN_W<'a> { w: &'a mut W, } impl<'a> RNGLPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: RNGLPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "SRAM1 Clock Enable During CSleep Mode"] pub type SRAM1LPEN_A = DCMILPEN_A; #[doc = "Reader of field `SRAM1LPEN`"] pub type SRAM1LPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `SRAM1LPEN`"] pub struct SRAM1LPEN_W<'a> { w: &'a mut W, } impl<'a> SRAM1LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SRAM1LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } #[doc = "SRAM2 Clock Enable During CSleep Mode"] pub type SRAM2LPEN_A = DCMILPEN_A; #[doc = "Reader of field `SRAM2LPEN`"] pub type SRAM2LPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `SRAM2LPEN`"] pub struct SRAM2LPEN_W<'a> { w: &'a mut W, } impl<'a> SRAM2LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SRAM2LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } #[doc = "SRAM3 Clock Enable During CSleep Mode"] pub type SRAM3LPEN_A = DCMILPEN_A; #[doc = "Reader of field `SRAM3LPEN`"] pub type SRAM3LPEN_R = crate::R<bool, DCMILPEN_A>; #[doc = "Write proxy for field `SRAM3LPEN`"] pub struct SRAM3LPEN_W<'a> { w: &'a mut W, } impl<'a> SRAM3LPEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SRAM3LPEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "The selected clock is disabled during csleep mode"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DCMILPEN_A::DISABLED) } #[doc = "The selected clock is enabled during csleep mode"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DCMILPEN_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } impl R { #[doc = "Bit 0 - DCMI peripheral clock enable during csleep mode"] #[inline(always)] pub fn dcmilpen(&self) -> DCMILPEN_R { DCMILPEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 4 - CRYPT peripheral clock enable during CSleep mode"] #[inline(always)] pub fn cryptlpen(&self) -> CRYPTLPEN_R { CRYPTLPEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - HASH peripheral clock enable during CSleep mode"] #[inline(always)] pub fn hashlpen(&self) -> HASHLPEN_R { HASHLPEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 9 - SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] #[inline(always)] pub fn sdmmc2lpen(&self) -> SDMMC2LPEN_R { SDMMC2LPEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 6 - RNG peripheral clock enable during CSleep mode"] #[inline(always)] pub fn rnglpen(&self) -> RNGLPEN_R { RNGLPEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 29 - SRAM1 Clock Enable During CSleep Mode"] #[inline(always)] pub fn sram1lpen(&self) -> SRAM1LPEN_R { SRAM1LPEN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - SRAM2 Clock Enable During CSleep Mode"] #[inline(always)] pub fn sram2lpen(&self) -> SRAM2LPEN_R { SRAM2LPEN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - SRAM3 Clock Enable During CSleep Mode"] #[inline(always)] pub fn sram3lpen(&self) -> SRAM3LPEN_R { SRAM3LPEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - DCMI peripheral clock enable during csleep mode"] #[inline(always)] pub fn dcmilpen(&mut self) -> DCMILPEN_W { DCMILPEN_W { w: self } } #[doc = "Bit 4 - CRYPT peripheral clock enable during CSleep mode"] #[inline(always)] pub fn cryptlpen(&mut self) -> CRYPTLPEN_W { CRYPTLPEN_W { w: self } } #[doc = "Bit 5 - HASH peripheral clock enable during CSleep mode"] #[inline(always)] pub fn hashlpen(&mut self) -> HASHLPEN_W { HASHLPEN_W { w: self } } #[doc = "Bit 9 - SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode"] #[inline(always)] pub fn sdmmc2lpen(&mut self) -> SDMMC2LPEN_W { SDMMC2LPEN_W { w: self } } #[doc = "Bit 6 - RNG peripheral clock enable during CSleep mode"] #[inline(always)] pub fn rnglpen(&mut self) -> RNGLPEN_W { RNGLPEN_W { w: self } } #[doc = "Bit 29 - SRAM1 Clock Enable During CSleep Mode"] #[inline(always)] pub fn sram1lpen(&mut self) -> SRAM1LPEN_W { SRAM1LPEN_W { w: self } } #[doc = "Bit 30 - SRAM2 Clock Enable During CSleep Mode"] #[inline(always)] pub fn sram2lpen(&mut self) -> SRAM2LPEN_W { SRAM2LPEN_W { w: self } } #[doc = "Bit 31 - SRAM3 Clock Enable During CSleep Mode"] #[inline(always)] pub fn sram3lpen(&mut self) -> SRAM3LPEN_W { SRAM3LPEN_W { w: self } } }