1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373
#[doc = "Reader of register C0CR"] pub type R = crate::R<u32, super::C0CR>; #[doc = "Writer for register C0CR"] pub type W = crate::W<u32, super::C0CR>; #[doc = "Register C0CR `reset()`'s with value 0"] impl crate::ResetValue for super::C0CR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `EN`"] pub type EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `EN`"] pub struct EN_W<'a> { w: &'a mut W, } impl<'a> EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `TEIE`"] pub type TEIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TEIE`"] pub struct TEIE_W<'a> { w: &'a mut W, } impl<'a> TEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `CTCIE`"] pub type CTCIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CTCIE`"] pub struct CTCIE_W<'a> { w: &'a mut W, } impl<'a> CTCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `BRTIE`"] pub type BRTIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BRTIE`"] pub struct BRTIE_W<'a> { w: &'a mut W, } impl<'a> BRTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `BTIE`"] pub type BTIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BTIE`"] pub struct BTIE_W<'a> { w: &'a mut W, } impl<'a> BTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `TCIE`"] pub type TCIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TCIE`"] pub struct TCIE_W<'a> { w: &'a mut W, } impl<'a> TCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `PL`"] pub type PL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PL`"] pub struct PL_W<'a> { w: &'a mut W, } impl<'a> PL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6); self.w } } #[doc = "Reader of field `BEX`"] pub type BEX_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BEX`"] pub struct BEX_W<'a> { w: &'a mut W, } impl<'a> BEX_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); self.w } } #[doc = "Reader of field `HEX`"] pub type HEX_R = crate::R<bool, bool>; #[doc = "Write proxy for field `HEX`"] pub struct HEX_W<'a> { w: &'a mut W, } impl<'a> HEX_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); self.w } } #[doc = "Reader of field `WEX`"] pub type WEX_R = crate::R<bool, bool>; #[doc = "Write proxy for field `WEX`"] pub struct WEX_W<'a> { w: &'a mut W, } impl<'a> WEX_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Write proxy for field `SWRQ`"] pub struct SWRQ_W<'a> { w: &'a mut W, } impl<'a> SWRQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } impl R { #[doc = "Bit 0 - channel enable"] #[inline(always)] pub fn en(&self) -> EN_R { EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Transfer error interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn teie(&self) -> TEIE_R { TEIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Channel Transfer Complete interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn ctcie(&self) -> CTCIE_R { CTCIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Block Repeat transfer interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn brtie(&self) -> BRTIE_R { BRTIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Block Transfer interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn btie(&self) -> BTIE_R { BTIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - buffer Transfer Complete interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn tcie(&self) -> TCIE_R { TCIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bits 6:7 - Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0."] #[inline(always)] pub fn pl(&self) -> PL_R { PL_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bit 12 - byte Endianness exchange"] #[inline(always)] pub fn bex(&self) -> BEX_R { BEX_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Half word Endianes exchange"] #[inline(always)] pub fn hex(&self) -> HEX_R { HEX_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Word Endianness exchange"] #[inline(always)] pub fn wex(&self) -> WEX_R { WEX_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - channel enable"] #[inline(always)] pub fn en(&mut self) -> EN_W { EN_W { w: self } } #[doc = "Bit 1 - Transfer error interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn teie(&mut self) -> TEIE_W { TEIE_W { w: self } } #[doc = "Bit 2 - Channel Transfer Complete interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn ctcie(&mut self) -> CTCIE_W { CTCIE_W { w: self } } #[doc = "Bit 3 - Block Repeat transfer interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn brtie(&mut self) -> BRTIE_W { BRTIE_W { w: self } } #[doc = "Bit 4 - Block Transfer interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn btie(&mut self) -> BTIE_W { BTIE_W { w: self } } #[doc = "Bit 5 - buffer Transfer Complete interrupt enable This bit is set and cleared by software."] #[inline(always)] pub fn tcie(&mut self) -> TCIE_W { TCIE_W { w: self } } #[doc = "Bits 6:7 - Priority level These bits are set and cleared by software. These bits are protected and can be written only if EN is 0."] #[inline(always)] pub fn pl(&mut self) -> PL_W { PL_W { w: self } } #[doc = "Bit 12 - byte Endianness exchange"] #[inline(always)] pub fn bex(&mut self) -> BEX_W { BEX_W { w: self } } #[doc = "Bit 13 - Half word Endianes exchange"] #[inline(always)] pub fn hex(&mut self) -> HEX_W { HEX_W { w: self } } #[doc = "Bit 14 - Word Endianness exchange"] #[inline(always)] pub fn wex(&mut self) -> WEX_W { WEX_W { w: self } } #[doc = "Bit 16 - SW ReQuest Writing a 1 into this bit sets the CRQAx in MDMA_ISRy register, activating the request on Channel x Note: Either the whole CxCR register or the 8-bit/16-bit register @ Address offset: 0x4E + 0x40 chn may be used for SWRQ activation. In case of a SW request, acknowledge is not generated (neither HW signal, nor CxMAR write access)."] #[inline(always)] pub fn swrq(&mut self) -> SWRQ_W { SWRQ_W { w: self } } }