Module cr 

RTC control register

Structs

CRrs

RTC control register

Enums

ADD1HW

Add 1 hour (summer time change) When this bit is set outside initialization mode, 1 hour is added to the calendar time. This bit is always read as 0.

ALRAE

Alarm %s enable

ALRAIE

Alarm %s interrupt enable

BKP

Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not.

BYPSHAD

Bypass the shadow registers Note: If the frequency of the APB1 clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1.

COE

Calibration output enable This bit enables the CALIB output

COSEL

Calibration output selection When COE = 1, this bit selects which signal is output on CALIB. These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values (PREDIV_A = 127 and PREDIV_S = 255). Refer to .

FMT

Hour format

ITSE

timestamp on internal event enable

OSEL

Output selection These bits are used to select the flag to be routed to TAMPALRM output.

OUT2EN

RTC_OUT2 output enable Setting this bit permits to remap the RTC outputs on RTC_OUT2 as follows: OUT2EN = 0: RTC output 2 disable If OSEL different 00 or TAMPOE = 1: TAMPALRM is output on RTC_OUT1 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT1 OUT2EN = 1: RTC output 2 enable If (OSEL different 00 or TAMPOE = 1) and COE = 0: TAMPALRM is output on RTC_OUT2 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT2 If (OSEL different 00 or TAMPOE = 1) and COE = 1: CALIB is output on RTC_OUT2 and TAMPALRM is output on RTC_OUT1.

POL

Output polarity This bit is used to configure the polarity of TAMPALRM output.

REFCKON

RTC_REFIN reference clock detection enable (50 or 60 Hz) Note: BIN must be 0x00 and PREDIV_S must be 0x00FF.

SUB1HW

Subtract 1 hour (winter time change) When this bit is set outside initialization mode, 1 hour is subtracted to the calendar time if the current hour is not 0. This bit is always read as 0. Setting this bit has no effect when current hour is 0.

TAMPALRM_PU

TAMPALRM pull-up enable

TAMPALRM_TYPE

TAMPALRM output type

TAMPOE

Tamper detection output enable on TAMPALRM

TAMPTS

Activate timestamp on tamper detection event TAMPTS is valid even if TSE = 0 in the RTC_CR register. Timestamp flag is set up to 3 ck_apre cycles after the tamper flags.

TSE

timestamp enable

TSEDGE

Timestamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting.

TSIE

Timestamp interrupt enable

WUCKSEL

ck_wut wakeup clock selection 10x: ck_spre (usually 1 Hz) clock is selected in BCD mode. In binary or mixed mode, this is the clock selected by BCDU. 11x: ck_spre (usually 1 Hz) clock is selected in BCD mode. In binary or mixed mode, this is the clock selected by BCDU. Furthermore, 216 is added to the WUT counter value.

WUTE

Wakeup timer enable Note: When the wakeup timer is disabled, wait for WUTWF = 1 before enabling it again.

WUTIE

Wakeup timer interrupt enable

Type Aliases

ADD1H_W

Field ADD1H writer - Add 1 hour (summer time change) When this bit is set outside initialization mode, 1 hour is added to the calendar time. This bit is always read as 0.

ALRAFCLR_R

Field ALRAFCLR reader - Alarm A flag automatic clear

ALRAFCLR_W

Field ALRAFCLR writer - Alarm A flag automatic clear

ALRBFCLR_R

Field ALRBFCLR reader - Alarm B flag automatic clear

ALRBFCLR_W

Field ALRBFCLR writer - Alarm B flag automatic clear

ALRE_R

Field ALRE(A,B) reader - Alarm %s enable

ALRE_W

Field ALRE(A,B) writer - Alarm %s enable

ALRIE_R

Field ALRIE(A,B) reader - Alarm %s interrupt enable

ALRIE_W

Field ALRIE(A,B) writer - Alarm %s interrupt enable

BKP_R

Field BKP reader - Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not.

BKP_W

Field BKP writer - Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not.

BYPSHAD_R

Field BYPSHAD reader - Bypass the shadow registers Note: If the frequency of the APB1 clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1.

BYPSHAD_W

Field BYPSHAD writer - Bypass the shadow registers Note: If the frequency of the APB1 clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1.

COE_R

Field COE reader - Calibration output enable This bit enables the CALIB output

COE_W

Field COE writer - Calibration output enable This bit enables the CALIB output

COSEL_R

Field COSEL reader - Calibration output selection When COE = 1, this bit selects which signal is output on CALIB. These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values (PREDIV_A = 127 and PREDIV_S = 255). Refer to .

COSEL_W

Field COSEL writer - Calibration output selection When COE = 1, this bit selects which signal is output on CALIB. These frequencies are valid for RTCCLK at 32.768 kHz and prescalers at their default values (PREDIV_A = 127 and PREDIV_S = 255). Refer to .

FMT_R

Field FMT reader - Hour format

FMT_W

Field FMT writer - Hour format

ITSE_R

Field ITSE reader - timestamp on internal event enable

ITSE_W

Field ITSE writer - timestamp on internal event enable

OSEL_R

Field OSEL reader - Output selection These bits are used to select the flag to be routed to TAMPALRM output.

OSEL_W

Field OSEL writer - Output selection These bits are used to select the flag to be routed to TAMPALRM output.

OUT2EN_R

Field OUT2EN reader - RTC_OUT2 output enable Setting this bit permits to remap the RTC outputs on RTC_OUT2 as follows: OUT2EN = 0: RTC output 2 disable If OSEL different 00 or TAMPOE = 1: TAMPALRM is output on RTC_OUT1 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT1 OUT2EN = 1: RTC output 2 enable If (OSEL different 00 or TAMPOE = 1) and COE = 0: TAMPALRM is output on RTC_OUT2 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT2 If (OSEL different 00 or TAMPOE = 1) and COE = 1: CALIB is output on RTC_OUT2 and TAMPALRM is output on RTC_OUT1.

OUT2EN_W

Field OUT2EN writer - RTC_OUT2 output enable Setting this bit permits to remap the RTC outputs on RTC_OUT2 as follows: OUT2EN = 0: RTC output 2 disable If OSEL different 00 or TAMPOE = 1: TAMPALRM is output on RTC_OUT1 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT1 OUT2EN = 1: RTC output 2 enable If (OSEL different 00 or TAMPOE = 1) and COE = 0: TAMPALRM is output on RTC_OUT2 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT2 If (OSEL different 00 or TAMPOE = 1) and COE = 1: CALIB is output on RTC_OUT2 and TAMPALRM is output on RTC_OUT1.

POL_R

Field POL reader - Output polarity This bit is used to configure the polarity of TAMPALRM output.

POL_W

Field POL writer - Output polarity This bit is used to configure the polarity of TAMPALRM output.

R

Register CR reader

REFCKON_R

Field REFCKON reader - RTC_REFIN reference clock detection enable (50 or 60 Hz) Note: BIN must be 0x00 and PREDIV_S must be 0x00FF.

REFCKON_W

Field REFCKON writer - RTC_REFIN reference clock detection enable (50 or 60 Hz) Note: BIN must be 0x00 and PREDIV_S must be 0x00FF.

SSRUIE_R

Field SSRUIE reader - SSR underflow interrupt enable

SSRUIE_W

Field SSRUIE writer - SSR underflow interrupt enable

SUB1H_W

Field SUB1H writer - Subtract 1 hour (winter time change) When this bit is set outside initialization mode, 1 hour is subtracted to the calendar time if the current hour is not 0. This bit is always read as 0. Setting this bit has no effect when current hour is 0.

TAMPALRM_PU_R

Field TAMPALRM_PU reader - TAMPALRM pull-up enable

TAMPALRM_PU_W

Field TAMPALRM_PU writer - TAMPALRM pull-up enable

TAMPALRM_TYPE_R

Field TAMPALRM_TYPE reader - TAMPALRM output type

TAMPALRM_TYPE_W

Field TAMPALRM_TYPE writer - TAMPALRM output type

TAMPOE_R

Field TAMPOE reader - Tamper detection output enable on TAMPALRM

TAMPOE_W

Field TAMPOE writer - Tamper detection output enable on TAMPALRM

TAMPTS_R

Field TAMPTS reader - Activate timestamp on tamper detection event TAMPTS is valid even if TSE = 0 in the RTC_CR register. Timestamp flag is set up to 3 ck_apre cycles after the tamper flags.

TAMPTS_W

Field TAMPTS writer - Activate timestamp on tamper detection event TAMPTS is valid even if TSE = 0 in the RTC_CR register. Timestamp flag is set up to 3 ck_apre cycles after the tamper flags.

TSEDGE_R

Field TSEDGE reader - Timestamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting.

TSEDGE_W

Field TSEDGE writer - Timestamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting.

TSE_R

Field TSE reader - timestamp enable

TSE_W

Field TSE writer - timestamp enable

TSIE_R

Field TSIE reader - Timestamp interrupt enable

TSIE_W

Field TSIE writer - Timestamp interrupt enable

W

Register CR writer

WUCKSEL_R

Field WUCKSEL reader - ck_wut wakeup clock selection 10x: ck_spre (usually 1 Hz) clock is selected in BCD mode. In binary or mixed mode, this is the clock selected by BCDU. 11x: ck_spre (usually 1 Hz) clock is selected in BCD mode. In binary or mixed mode, this is the clock selected by BCDU. Furthermore, 216 is added to the WUT counter value.

WUCKSEL_W

Field WUCKSEL writer - ck_wut wakeup clock selection 10x: ck_spre (usually 1 Hz) clock is selected in BCD mode. In binary or mixed mode, this is the clock selected by BCDU. 11x: ck_spre (usually 1 Hz) clock is selected in BCD mode. In binary or mixed mode, this is the clock selected by BCDU. Furthermore, 216 is added to the WUT counter value.

WUTE_R

Field WUTE reader - Wakeup timer enable Note: When the wakeup timer is disabled, wait for WUTWF = 1 before enabling it again.

WUTE_W

Field WUTE writer - Wakeup timer enable Note: When the wakeup timer is disabled, wait for WUTWF = 1 before enabling it again.

WUTIE_R

Field WUTIE reader - Wakeup timer interrupt enable

WUTIE_W

Field WUTIE writer - Wakeup timer interrupt enable