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#[doc = "Reader of register APB1SMENR1"] pub type R = crate::R<u32, super::APB1SMENR1>; #[doc = "Writer for register APB1SMENR1"] pub type W = crate::W<u32, super::APB1SMENR1>; #[doc = "Register APB1SMENR1 `reset()`'s with value 0xd2fe_cd3f"] impl crate::ResetValue for super::APB1SMENR1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0xd2fe_cd3f } } #[doc = "Reader of field `TIM2SMEN`"] pub type TIM2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM2SMEN`"] pub struct TIM2SMEN_W<'a> { w: &'a mut W, } impl<'a> TIM2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `TIM3SMEN`"] pub type TIM3SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM3SMEN`"] pub struct TIM3SMEN_W<'a> { w: &'a mut W, } impl<'a> TIM3SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `TIM4SMEN`"] pub type TIM4SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM4SMEN`"] pub struct TIM4SMEN_W<'a> { w: &'a mut W, } impl<'a> TIM4SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `TIM5SMEN`"] pub type TIM5SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM5SMEN`"] pub struct TIM5SMEN_W<'a> { w: &'a mut W, } impl<'a> TIM5SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `TIM6SMEN`"] pub type TIM6SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM6SMEN`"] pub struct TIM6SMEN_W<'a> { w: &'a mut W, } impl<'a> TIM6SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `TIM7SMEN`"] pub type TIM7SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM7SMEN`"] pub struct TIM7SMEN_W<'a> { w: &'a mut W, } impl<'a> TIM7SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `CRSSMEN`"] pub type CRSSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CRSSMEN`"] pub struct CRSSMEN_W<'a> { w: &'a mut W, } impl<'a> CRSSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `RTCAPBSMEN`"] pub type RTCAPBSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RTCAPBSMEN`"] pub struct RTCAPBSMEN_W<'a> { w: &'a mut W, } impl<'a> RTCAPBSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "Reader of field `WWDGSMEN`"] pub type WWDGSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `WWDGSMEN`"] pub struct WWDGSMEN_W<'a> { w: &'a mut W, } impl<'a> WWDGSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `SPI2SMEN`"] pub type SPI2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SPI2SMEN`"] pub struct SPI2SMEN_W<'a> { w: &'a mut W, } impl<'a> SPI2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `SP3SMEN`"] pub type SP3SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SP3SMEN`"] pub struct SP3SMEN_W<'a> { w: &'a mut W, } impl<'a> SP3SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "Reader of field `USART2SMEN`"] pub type USART2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART2SMEN`"] pub struct USART2SMEN_W<'a> { w: &'a mut W, } impl<'a> USART2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `USART3SMEN`"] pub type USART3SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART3SMEN`"] pub struct USART3SMEN_W<'a> { w: &'a mut W, } impl<'a> USART3SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `UART4SMEN`"] pub type UART4SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UART4SMEN`"] pub struct UART4SMEN_W<'a> { w: &'a mut W, } impl<'a> UART4SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `UART5SMEN`"] pub type UART5SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UART5SMEN`"] pub struct UART5SMEN_W<'a> { w: &'a mut W, } impl<'a> UART5SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Reader of field `I2C1SMEN`"] pub type I2C1SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C1SMEN`"] pub struct I2C1SMEN_W<'a> { w: &'a mut W, } impl<'a> I2C1SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } #[doc = "Reader of field `I2C2SMEN`"] pub type I2C2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C2SMEN`"] pub struct I2C2SMEN_W<'a> { w: &'a mut W, } impl<'a> I2C2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); self.w } } #[doc = "Reader of field `FDCANSMEN`"] pub type FDCANSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FDCANSMEN`"] pub struct FDCANSMEN_W<'a> { w: &'a mut W, } impl<'a> FDCANSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); self.w } } #[doc = "Reader of field `PWRSMEN`"] pub type PWRSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PWRSMEN`"] pub struct PWRSMEN_W<'a> { w: &'a mut W, } impl<'a> PWRSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); self.w } } #[doc = "Reader of field `LPTIM1SMEN`"] pub type LPTIM1SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LPTIM1SMEN`"] pub struct LPTIM1SMEN_W<'a> { w: &'a mut W, } impl<'a> LPTIM1SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } #[doc = "Reader of field `USBSMEN`"] pub type USBSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USBSMEN`"] pub struct USBSMEN_W<'a> { w: &'a mut W, } impl<'a> USBSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); self.w } } #[doc = "Reader of field `I2C3SMEN`"] pub type I2C3SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C3SMEN`"] pub struct I2C3SMEN_W<'a> { w: &'a mut W, } impl<'a> I2C3SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } impl R { #[doc = "Bit 0 - TIM2 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim2smen(&self) -> TIM2SMEN_R { TIM2SMEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - TIM3 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim3smen(&self) -> TIM3SMEN_R { TIM3SMEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - TIM4 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim4smen(&self) -> TIM4SMEN_R { TIM4SMEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - TIM5 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim5smen(&self) -> TIM5SMEN_R { TIM5SMEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - TIM6 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim6smen(&self) -> TIM6SMEN_R { TIM6SMEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - TIM7 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim7smen(&self) -> TIM7SMEN_R { TIM7SMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 8 - CRS clock enable during sleep mode"] #[inline(always)] pub fn crssmen(&self) -> CRSSMEN_R { CRSSMEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 10 - RTC APB clock enable during Sleep and Stop modes"] #[inline(always)] pub fn rtcapbsmen(&self) -> RTCAPBSMEN_R { RTCAPBSMEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Window watchdog clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn wwdgsmen(&self) -> WWDGSMEN_R { WWDGSMEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 14 - SPI2 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn spi2smen(&self) -> SPI2SMEN_R { SPI2SMEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - SPI3 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn sp3smen(&self) -> SP3SMEN_R { SP3SMEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - USART2 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn usart2smen(&self) -> USART2SMEN_R { USART2SMEN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - USART3 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn usart3smen(&self) -> USART3SMEN_R { USART3SMEN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - UART4 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn uart4smen(&self) -> UART4SMEN_R { UART4SMEN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - UART5 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn uart5smen(&self) -> UART5SMEN_R { UART5SMEN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - I2C1 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn i2c1smen(&self) -> I2C1SMEN_R { I2C1SMEN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - I2C2 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn i2c2smen(&self) -> I2C2SMEN_R { I2C2SMEN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 25 - FDCAN clock enable during sleep mode"] #[inline(always)] pub fn fdcansmen(&self) -> FDCANSMEN_R { FDCANSMEN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 28 - Power interface clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn pwrsmen(&self) -> PWRSMEN_R { PWRSMEN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 31 - Low Power Timer1 clock enable during sleep mode"] #[inline(always)] pub fn lptim1smen(&self) -> LPTIM1SMEN_R { LPTIM1SMEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 23 - USB device clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn usbsmen(&self) -> USBSMEN_R { USBSMEN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 30 - I2C3 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn i2c3smen(&self) -> I2C3SMEN_R { I2C3SMEN_R::new(((self.bits >> 30) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - TIM2 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim2smen(&mut self) -> TIM2SMEN_W { TIM2SMEN_W { w: self } } #[doc = "Bit 1 - TIM3 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim3smen(&mut self) -> TIM3SMEN_W { TIM3SMEN_W { w: self } } #[doc = "Bit 2 - TIM4 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim4smen(&mut self) -> TIM4SMEN_W { TIM4SMEN_W { w: self } } #[doc = "Bit 3 - TIM5 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim5smen(&mut self) -> TIM5SMEN_W { TIM5SMEN_W { w: self } } #[doc = "Bit 4 - TIM6 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim6smen(&mut self) -> TIM6SMEN_W { TIM6SMEN_W { w: self } } #[doc = "Bit 5 - TIM7 timer clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn tim7smen(&mut self) -> TIM7SMEN_W { TIM7SMEN_W { w: self } } #[doc = "Bit 8 - CRS clock enable during sleep mode"] #[inline(always)] pub fn crssmen(&mut self) -> CRSSMEN_W { CRSSMEN_W { w: self } } #[doc = "Bit 10 - RTC APB clock enable during Sleep and Stop modes"] #[inline(always)] pub fn rtcapbsmen(&mut self) -> RTCAPBSMEN_W { RTCAPBSMEN_W { w: self } } #[doc = "Bit 11 - Window watchdog clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn wwdgsmen(&mut self) -> WWDGSMEN_W { WWDGSMEN_W { w: self } } #[doc = "Bit 14 - SPI2 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn spi2smen(&mut self) -> SPI2SMEN_W { SPI2SMEN_W { w: self } } #[doc = "Bit 15 - SPI3 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn sp3smen(&mut self) -> SP3SMEN_W { SP3SMEN_W { w: self } } #[doc = "Bit 17 - USART2 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn usart2smen(&mut self) -> USART2SMEN_W { USART2SMEN_W { w: self } } #[doc = "Bit 18 - USART3 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn usart3smen(&mut self) -> USART3SMEN_W { USART3SMEN_W { w: self } } #[doc = "Bit 19 - UART4 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn uart4smen(&mut self) -> UART4SMEN_W { UART4SMEN_W { w: self } } #[doc = "Bit 20 - UART5 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn uart5smen(&mut self) -> UART5SMEN_W { UART5SMEN_W { w: self } } #[doc = "Bit 21 - I2C1 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn i2c1smen(&mut self) -> I2C1SMEN_W { I2C1SMEN_W { w: self } } #[doc = "Bit 22 - I2C2 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn i2c2smen(&mut self) -> I2C2SMEN_W { I2C2SMEN_W { w: self } } #[doc = "Bit 25 - FDCAN clock enable during sleep mode"] #[inline(always)] pub fn fdcansmen(&mut self) -> FDCANSMEN_W { FDCANSMEN_W { w: self } } #[doc = "Bit 28 - Power interface clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn pwrsmen(&mut self) -> PWRSMEN_W { PWRSMEN_W { w: self } } #[doc = "Bit 31 - Low Power Timer1 clock enable during sleep mode"] #[inline(always)] pub fn lptim1smen(&mut self) -> LPTIM1SMEN_W { LPTIM1SMEN_W { w: self } } #[doc = "Bit 23 - USB device clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn usbsmen(&mut self) -> USBSMEN_W { USBSMEN_W { w: self } } #[doc = "Bit 30 - I2C3 clocks enable during Sleep and Stop modes"] #[inline(always)] pub fn i2c3smen(&mut self) -> I2C3SMEN_W { I2C3SMEN_W { w: self } } }