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#[doc = "Reader of register APB1RSTR1"] pub type R = crate::R<u32, super::APB1RSTR1>; #[doc = "Writer for register APB1RSTR1"] pub type W = crate::W<u32, super::APB1RSTR1>; #[doc = "Register APB1RSTR1 `reset()`'s with value 0"] impl crate::ResetValue for super::APB1RSTR1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `LPTIM1RST`"] pub type LPTIM1RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LPTIM1RST`"] pub struct LPTIM1RST_W<'a> { w: &'a mut W, } impl<'a> LPTIM1RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } #[doc = "Reader of field `I2C3RST`"] pub type I2C3RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C3RST`"] pub struct I2C3RST_W<'a> { w: &'a mut W, } impl<'a> I2C3RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } #[doc = "Reader of field `PWRRST`"] pub type PWRRST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PWRRST`"] pub struct PWRRST_W<'a> { w: &'a mut W, } impl<'a> PWRRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); self.w } } #[doc = "Reader of field `FDCANRST`"] pub type FDCANRST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FDCANRST`"] pub struct FDCANRST_W<'a> { w: &'a mut W, } impl<'a> FDCANRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); self.w } } #[doc = "Reader of field `USBRST`"] pub type USBRST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USBRST`"] pub struct USBRST_W<'a> { w: &'a mut W, } impl<'a> USBRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); self.w } } #[doc = "Reader of field `I2C2RST`"] pub type I2C2RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C2RST`"] pub struct I2C2RST_W<'a> { w: &'a mut W, } impl<'a> I2C2RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); self.w } } #[doc = "Reader of field `I2C1RST`"] pub type I2C1RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `I2C1RST`"] pub struct I2C1RST_W<'a> { w: &'a mut W, } impl<'a> I2C1RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); self.w } } #[doc = "Reader of field `UART5RST`"] pub type UART5RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UART5RST`"] pub struct UART5RST_W<'a> { w: &'a mut W, } impl<'a> UART5RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Reader of field `UART4RST`"] pub type UART4RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UART4RST`"] pub struct UART4RST_W<'a> { w: &'a mut W, } impl<'a> UART4RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); self.w } } #[doc = "Reader of field `USART3RST`"] pub type USART3RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART3RST`"] pub struct USART3RST_W<'a> { w: &'a mut W, } impl<'a> USART3RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `USART2RST`"] pub type USART2RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `USART2RST`"] pub struct USART2RST_W<'a> { w: &'a mut W, } impl<'a> USART2RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `SPI3RST`"] pub type SPI3RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SPI3RST`"] pub struct SPI3RST_W<'a> { w: &'a mut W, } impl<'a> SPI3RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); self.w } } #[doc = "Reader of field `SPI2RST`"] pub type SPI2RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SPI2RST`"] pub struct SPI2RST_W<'a> { w: &'a mut W, } impl<'a> SPI2RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `CRSRST`"] pub type CRSRST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CRSRST`"] pub struct CRSRST_W<'a> { w: &'a mut W, } impl<'a> CRSRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `TIM7RST`"] pub type TIM7RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM7RST`"] pub struct TIM7RST_W<'a> { w: &'a mut W, } impl<'a> TIM7RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `TIM6RST`"] pub type TIM6RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM6RST`"] pub struct TIM6RST_W<'a> { w: &'a mut W, } impl<'a> TIM6RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `TIM5RST`"] pub type TIM5RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM5RST`"] pub struct TIM5RST_W<'a> { w: &'a mut W, } impl<'a> TIM5RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `TIM4RST`"] pub type TIM4RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM4RST`"] pub struct TIM4RST_W<'a> { w: &'a mut W, } impl<'a> TIM4RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `TIM3RST`"] pub type TIM3RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM3RST`"] pub struct TIM3RST_W<'a> { w: &'a mut W, } impl<'a> TIM3RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `TIM2RST`"] pub type TIM2RST_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TIM2RST`"] pub struct TIM2RST_W<'a> { w: &'a mut W, } impl<'a> TIM2RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl R { #[doc = "Bit 31 - Low Power Timer 1 reset"] #[inline(always)] pub fn lptim1rst(&self) -> LPTIM1RST_R { LPTIM1RST_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - I2C3 interface reset"] #[inline(always)] pub fn i2c3rst(&self) -> I2C3RST_R { I2C3RST_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 28 - Power interface reset"] #[inline(always)] pub fn pwrrst(&self) -> PWRRST_R { PWRRST_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 25 - FDCAN reset"] #[inline(always)] pub fn fdcanrst(&self) -> FDCANRST_R { FDCANRST_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 23 - USBD reset"] #[inline(always)] pub fn usbrst(&self) -> USBRST_R { USBRST_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - I2C2 reset"] #[inline(always)] pub fn i2c2rst(&self) -> I2C2RST_R { I2C2RST_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - I2C1 reset"] #[inline(always)] pub fn i2c1rst(&self) -> I2C1RST_R { I2C1RST_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - UART5 reset"] #[inline(always)] pub fn uart5rst(&self) -> UART5RST_R { UART5RST_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - UART4 reset"] #[inline(always)] pub fn uart4rst(&self) -> UART4RST_R { UART4RST_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - USART3 reset"] #[inline(always)] pub fn usart3rst(&self) -> USART3RST_R { USART3RST_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - USART2 reset"] #[inline(always)] pub fn usart2rst(&self) -> USART2RST_R { USART2RST_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 15 - SPI3 reset"] #[inline(always)] pub fn spi3rst(&self) -> SPI3RST_R { SPI3RST_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - SPI2 reset"] #[inline(always)] pub fn spi2rst(&self) -> SPI2RST_R { SPI2RST_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 8 - Clock recovery system reset"] #[inline(always)] pub fn crsrst(&self) -> CRSRST_R { CRSRST_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 5 - TIM7 timer reset"] #[inline(always)] pub fn tim7rst(&self) -> TIM7RST_R { TIM7RST_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - TIM6 timer reset"] #[inline(always)] pub fn tim6rst(&self) -> TIM6RST_R { TIM6RST_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - TIM5 timer reset"] #[inline(always)] pub fn tim5rst(&self) -> TIM5RST_R { TIM5RST_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - TIM3 timer reset"] #[inline(always)] pub fn tim4rst(&self) -> TIM4RST_R { TIM4RST_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - TIM3 timer reset"] #[inline(always)] pub fn tim3rst(&self) -> TIM3RST_R { TIM3RST_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - TIM2 timer reset"] #[inline(always)] pub fn tim2rst(&self) -> TIM2RST_R { TIM2RST_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 31 - Low Power Timer 1 reset"] #[inline(always)] pub fn lptim1rst(&mut self) -> LPTIM1RST_W { LPTIM1RST_W { w: self } } #[doc = "Bit 30 - I2C3 interface reset"] #[inline(always)] pub fn i2c3rst(&mut self) -> I2C3RST_W { I2C3RST_W { w: self } } #[doc = "Bit 28 - Power interface reset"] #[inline(always)] pub fn pwrrst(&mut self) -> PWRRST_W { PWRRST_W { w: self } } #[doc = "Bit 25 - FDCAN reset"] #[inline(always)] pub fn fdcanrst(&mut self) -> FDCANRST_W { FDCANRST_W { w: self } } #[doc = "Bit 23 - USBD reset"] #[inline(always)] pub fn usbrst(&mut self) -> USBRST_W { USBRST_W { w: self } } #[doc = "Bit 22 - I2C2 reset"] #[inline(always)] pub fn i2c2rst(&mut self) -> I2C2RST_W { I2C2RST_W { w: self } } #[doc = "Bit 21 - I2C1 reset"] #[inline(always)] pub fn i2c1rst(&mut self) -> I2C1RST_W { I2C1RST_W { w: self } } #[doc = "Bit 20 - UART5 reset"] #[inline(always)] pub fn uart5rst(&mut self) -> UART5RST_W { UART5RST_W { w: self } } #[doc = "Bit 19 - UART4 reset"] #[inline(always)] pub fn uart4rst(&mut self) -> UART4RST_W { UART4RST_W { w: self } } #[doc = "Bit 18 - USART3 reset"] #[inline(always)] pub fn usart3rst(&mut self) -> USART3RST_W { USART3RST_W { w: self } } #[doc = "Bit 17 - USART2 reset"] #[inline(always)] pub fn usart2rst(&mut self) -> USART2RST_W { USART2RST_W { w: self } } #[doc = "Bit 15 - SPI3 reset"] #[inline(always)] pub fn spi3rst(&mut self) -> SPI3RST_W { SPI3RST_W { w: self } } #[doc = "Bit 14 - SPI2 reset"] #[inline(always)] pub fn spi2rst(&mut self) -> SPI2RST_W { SPI2RST_W { w: self } } #[doc = "Bit 8 - Clock recovery system reset"] #[inline(always)] pub fn crsrst(&mut self) -> CRSRST_W { CRSRST_W { w: self } } #[doc = "Bit 5 - TIM7 timer reset"] #[inline(always)] pub fn tim7rst(&mut self) -> TIM7RST_W { TIM7RST_W { w: self } } #[doc = "Bit 4 - TIM6 timer reset"] #[inline(always)] pub fn tim6rst(&mut self) -> TIM6RST_W { TIM6RST_W { w: self } } #[doc = "Bit 3 - TIM5 timer reset"] #[inline(always)] pub fn tim5rst(&mut self) -> TIM5RST_W { TIM5RST_W { w: self } } #[doc = "Bit 2 - TIM3 timer reset"] #[inline(always)] pub fn tim4rst(&mut self) -> TIM4RST_W { TIM4RST_W { w: self } } #[doc = "Bit 1 - TIM3 timer reset"] #[inline(always)] pub fn tim3rst(&mut self) -> TIM3RST_W { TIM3RST_W { w: self } } #[doc = "Bit 0 - TIM2 timer reset"] #[inline(always)] pub fn tim2rst(&mut self) -> TIM2RST_W { TIM2RST_W { w: self } } }